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Slide courtesy of HKEPC
Intel will release its new "Tolapai" system-on-chip by the end of 2007 for embedded markets

Intel expects to penetrate the industrial and embedded computing markets with its Tolapai integrated system-on-chip. Tolapai will be a system-on-chip design that integrates the CPU, north bridge and south bridge functionality into a processor. According to documentation leaked earlier this Intel expects to ready Tolapai by the end of 2007 to take on VIA’s C7 CoreFusion and AMD’s Geode platforms.

Tolapai will feature a cut-down Pentium M-derived processor core with 256KB of L2-cache. Intel will offer Tolapai in three clock-speeds – 600 MHz, 1066 MHz and 1200 MHz. Power consumption will vary from 13-22-watts depending on clock speed. Tolapai supports a maximum of 2GB of DDR2-400/533/667/800 memory in dual-channel configurations.

 Intel will manufacturer Tolapai on a 65-nanometer fabrication process. It will feature 1,088-ball FCBGA packaging that measures in at 1.092-mm.

Unlike the Pentium M and Core architecture processors, Tolapai’s CPU-core will have hardware accelerated security encryption and decryption functions like VIA’s C7 and C3 Nehemiah-core processors. Supported hardware security encryption methods include: AES, 3DES, RC4, MD5, SHA-1, SHA-224, SHA-256, SHA-384, SHA-512, HMAC, ESA and DSA.

Tolapai will not have integrated graphics according to slides featured on HKEPC. Nevertheless, four PCIe lanes will be available for PCIe graphics cards. Four additional PCIe lanes will also be available on Tolapai for up to four PCIe x1 slots.

With a proper PHY, Tolapai-based boards can have up to three Gigabit Ethernet controllers. Integrated Gigabit controllers feature hardware accelerated network packet processing.   

On the south bridge I/O side-of-things, Tolapai supports all legacy Super I/O connections. This includes floppy, parallel, serial and PS/2 ports. The integrated UART controller provides support for up to two RS232 9-pin serial ports while other legacy functionality is provided via LPC bus. The Intel Tolapai reference motherboard provides a third UART controller and support for a Trusted Platform Module in addition to the usual floppy and parallel ports.

Intel will also implemented support for up to two CAN-bus ports for automotive applications. Other notable supported features include two SMBus/I2C, two USB 1.1/2.0, two SATA 3.0Gbps, sync serial port and local expansion bus. Mezzanine connectors are also available for the expansion bus interfaces.

Intel is already providing reference boards to customers. The current Tolapai system-on-chip reference board features support for two DDR2 DIMM’s, one physical PCIe x8 slot with four lanes, four PCIe x1 ports, three RJ45 Ethernet connectors, TPM support and a standard ATX power connector. Three Mezzanine connectors are available for TDM and exp buses. Support for super I/O is optional on the Tolapai reference board.




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