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AMD processors made their way from Dubi to Iran, only to show up in Iran's most powerful supercomputer

Iran has a supercomputer constructed with 216 AMD processors, and it's got a lot of websites pretty mad. 

The whole thing reads like an advertisement really.  "An enormously powerful supercomputer" proclaims Slashdot. "such advanced U.S. computing technology is a real breach in U.S. sanctions," warns a UPI editor.

It's true that U.S. semiconductors are banned from entering Iranian borders, but I wonder if those editors know the computing power 860 gigaFLOPS really commands in the HPC world.

A total of four PlayStation 3s running Linux have just a hair less computing power than this computer.  A pair of IBM's newest and tiniest BladeCenter QS21 servers would out-compute Iran's new supercomputer without breaking a sweat.

InformationWeek was quick to get a quote on the story: "AMD fully complies with all United States export control laws, and all authorized distributors of AMD products have contractually committed to AMD that they will do the same with respect to their sales and shipments of AMD products ... Any shipment of AMD products to Iran by any authorized distributor of AMD would be a breach of the specific provisions of their contracts with AMD."

Just for comparison, IBM's BlueGene/L, the world's fastest publicly-known supercomputer, runs at a mere 478 teraFLOPs.

Amirkabir University of Technology, owner of the supercomputer, claims the system is for weather forecasting -- incidentally using the MM5 platform developed by the U.S. National Center for Atmospheric Research.


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By s12033722 on 12/12/2007 1:18:01 PM , Rating: 1
It would have still been in the top 500 as of 2004. It's a powerful system, more powerful than the systems we were doing nuclear weapons simulations on only a decade ago, and quite capable of doing such simulations today, something the Cell systems are notably unable to do thanks to their extremely limited I/O capabilities. The comparision to Cell systems is extremely misleading.




By KristopherKubicki (blog) on 12/12/2007 1:34:42 PM , Rating: 2
quote:
something the Cell systems are notably unable to do thanks to their extremely limited I/O capabilities

Where did you read that?


By GeorgeOrwell on 12/12/2007 7:59:16 PM , Rating: 1
Are you referring to the systems that have been built using Cell processors or to the Cell processors themselves? For the Cell processor itself has very good memory and I/O capabilities:

"Cell’s On-Die Memory Controller

For years, we’ve known that Rambus’ memory and interface technology is well ahead of the competition. The problem is that it has never been implemented well on a PC before. The Rambus brand received a fairly negative connotation during the early days of RDRAM on the PC, and things worsened even more for the company’s brand with the Rambus vs. the DDR world lawsuits.

Rambus has had success in a lot of consumer electronics devices, such as HDTVs and the Playstation 2, so when Cell was announced to make heavy use of Rambus technologies, it wasn’t too surprising. As we’ve reported before, Rambus technology is used in about 90% of the signaling pins on Cell. The remaining 10% are mostly test pins, so basically, Rambus handles all data going in and out of the Cell processor. They do so in two ways:

First off, Cell includes an on-die dual channel XDR memory controller, each channel being 36-bits wide (32-bits with ECC). Cell’s XDR memory bus runs at 400MHz, but XDR memory transfers data at 8 times the memory bus clock - meaning that you get 3.2GHz data signaling rates. The end result is GPU-like memory bandwidth of 25.6GB/s. As we’ve mentioned in our coverage of this year’s Spring IDF, memory bandwidth requirements increase tremendously as you increase the number of processor cores - with 9 total in Cell, XDR is the perfect fit. Note that the GeForce 6800GT offers 32GB/s of memory bandwidth just to its GPU, so it would not be too surprising to see the Playstation 3’s GPU paired up with its own local memory as well as being able to share system memory and bandwidth.

The block labeled MIC is the XDR memory controller, and the XIO block is the physical layer - all of the input receivers and output drivers are in the XIO block. Data pipelines are also present in the XIO block.

As we’ve seen from AMD’s Athlon 64, having a memory controller on-die significantly reduces memory latencies, which applies to Cell as well.

Cell’s On-Die FlexIO Interface

The other important I/O aspect of Cell is also controlled by Rambus - the FlexIO interface. Cell features two configurable FlexIO interfaces, each being 48-bits wide with 6.4GHz data signaling rates.

The BEI block is effectively the North Bridge interface, while the FlexIO block is the physical FlexIO layer.
The word “configurable” is particularly important as it means that you don’t need to connect every wire. Taking this notion one step further, don’t look at the FlexIO interfaces as being able to connect to one chip, but rather multiple chips with different width FlexIO interfaces.

One potential implementation of Cell’s configurable FlexIO interface. While Cell’s XDR interface offers over 2x the memory bandwidth of any PC-based microprocsesor, Cell’s FlexIO interface weighs in at 76.8GB/s - almost 10x the chip-to-chip bandwidth of AMD’s Athlon 64.

In Playstation 3, you can pretty much expect a good hunk of this bandwidth to be between NVIDIA’s GPU and the Cell processor, but it also can be used for some pretty heavy I/O interfaces.

One of the major requirements in any high performance game console is bandwidth, and thanks to Rambus, Cell has plenty of it.


Quoted from here:
http://www.anandtech.com/printarticle.aspx?i=2379

Much more information available here:
http://www-01.ibm.com/chips/techlib/techlib.nsf/pr...


"There is a single light of science, and to brighten it anywhere is to brighten it everywhere." -- Isaac Asimov














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