Understanding AMD's "TLB" Processor Bug
December 5, 2007 11:56 AM
comment(s) - last by
Much of AMD's bad luck over the last three months revolves around a nasty bug it just can't shake
Erratum, to those in the hardware or software industry, is a nice way of saying "we missed a test case" during development and design.
The Tech Report
AMD's iteration of Intel's F00F bug
. The bug, which has been documented since at least early November, can cause a deadlock during recursive or nested cache writes.
How does the TLB erratum occur? All AMD quad-core processors utilize a shared L3 cache. In instances where the software uses nested memory pages, this processor will experience a race condition.
AMD's desktop product marketing manager Michael Saucier describes a race condition as a series of events "where the other guy wins who isn't supposed to win."
In the software world, a typical memory race condition occurs when the memory arbiter is instructed to overwrite an older block of memory, but write the old block of memory to somewhere else in cache. In the instance where two arbiters follow this same rule set, its easy to see how a race condition can occur: both arbiters attempt to overwrite the same blocks of information, resulting in a deadlock.
From what AMD engineers would tell
, this example is very similar to what occurs with nested memory pages in virtualized machines on these K10 processors.
AMD has since released a new BIOS patch for all K10 motherboards, including
the often cited but rarely seen MSI K9A2 Platinum
. This patch, confirmed by
, will result in at least a 10% reduction in general computing speed.
AMD partners tell
that all bulk
shipments have been halted pending application screening based on the customer. Cray, for example, was allowed its latest allocation for machines that will not use these nested virtualization techniques. Other AMD corporate customers were told to use Revision F3 (K8) processors in the meantime.
The TLB erratum will be fixed in the B3 stepping of all AMD quad-core processors, including Phenom and
. However, AMD considers the B3 stepping a "March" item on its 2008 roadmap. Processors shipped between then and now will still carry the TLB bug, though with the BIOS workaround these machines will not experience a lockup.
The delayed Phenom 9700 is affected by the TLB bug, though AMD insiders tell
the upcoming 2.6 GHz Phenom 9900 is not affected
. This indicates Phenom 9900 will carry the B3-stepping designation.
AMD's latest roadmap hints that its tri-core processors are merely quad-core processors with one core disabled. The company also indicated that it will introduce some of these tri-core processors with the L3 cache disabled. Removing the shared-L3 cache from the chip design eliminates the TLB bug.
In a likely-related event, AMD's newest corporate roadmap scheduled three Phenom processors for the first half of 2008; one of which is the Phenom 9700. The company will launch
eleven new 65nm K8 processors in the same time period
This article is over a month old, voting and posting comments is disabled
RE: Erratum is nothing new
12/6/2007 8:32:10 AM
I remember very well I made a post sometime ago about-
IBM touted the 1.9GHz Opteron-based System x 3455 as a marvel, running the box through the SPEC CPU2006 suite. And now, just a few weeks later, IBM has flagged its benchmarks as non-compliant because it cannot get the systems to customers in a reasonable amount of time.
IBM knew about this problem we are discussing now way back months ago.
I had the doubts/suspicions when I read the link above that time months ago,as its not manufacturing rather flaws that IBM discovered in their own testing & passed them to AMD.
IBM is actively involved with AMD in their development work & testing etc.
When IBM doesnt sell (Barcelona based systems)means its serious trouble/problems etc-IBM gets first priority in supply of CPUs over other OEMs from AMD.
"Well, we didn't have anyone in line that got shot waiting for our system." -- Nintendo of America Vice President Perrin Kaplan
AMD Phenom 2008 Roadmap
December 5, 2007, 10:08 AM
AMD Resurrects K8 Architecture for 2008 Roadmap
December 5, 2007, 10:22 AM
Leaked AMD Memo Sheds Light on Phenom CPU, Motherboard Availability
December 4, 2007, 1:22 PM
Rosewill Releases 3 New Powerline Networking Adapters
May 21, 2013, 4:29 PM
German Researchers Test 40 Gbps Wireless Broadband
May 21, 2013, 11:01 AM
Qualcomm, Samsung Push AMD to Fourth Place in Processor Market
May 21, 2013, 7:50 AM
Supermicro Looks to Shake Up Server Market
May 20, 2013, 9:00 PM
HiPerGator Supercomputer is Florida's Most Powerful Supercomputer
May 17, 2013, 7:08 AM
5/7/2013 Daily Hardware Reviews
May 7, 2013, 12:02 PM
Most Popular Articles
High School Student Creates Storage Device that Can Charge in 20 Seconds
May 20, 2013, 6:51 AM
Seawater Cooling Saves Data Center Big Bucks, Energy, Despite Jellyfish Issues
May 17, 2013, 3:23 PM
Newegg Legal Chief: "We don't Feed the Trolls"; Defeats Bell Lab Shell Comp.
May 17, 2013, 10:11 AM
Former Intel CEO Regrets Passing Up on iPhone Gravy Train
May 17, 2013, 11:46 AM
NASA Awards $125,000 Grant for 3D Printed Food on Long-Term Space Travels
May 21, 2013, 1:32 PM
Latest Blog Posts
Lumosity: Does it Work?
May 22, 2013, 8:20 PM
Quick Note: Sony "Teases" PS4 Ahead of Xbox Reveal in New Video
May 20, 2013, 12:33 PM
Nokia Introduces Instagram-Like App of Its Own to Help Lumia Sales
May 20, 2013, 7:10 AM
Parents of Pre-Teen Drivers Commonly Practice Distracted Driving Says Study
May 9, 2013, 7:16 AM
Apple's iOS 7 Running Into Internal Delays Due to Massive Overhaul
May 1, 2013, 4:26 PM
More Blog Posts
Copyright 2013 DailyTech LLC. -
Terms, Conditions & Privacy Information