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Much of AMD's bad luck over the last three months revolves around a nasty bug it just can't shake

Erratum, to those in the hardware or software industry, is a nice way of saying "we missed a test case" during development and design. 

Yesterday, The Tech Report confirmed AMD's iteration of Intel's F00F bug.  The bug, which has been documented since at least early November, can cause a deadlock during recursive or nested cache writes. 

How does the TLB erratum occur?  All AMD quad-core processors utilize a shared L3 cache.  In instances where the software uses nested memory pages, this processor will experience a race condition. 

AMD's desktop product marketing manager Michael Saucier describes a race condition as a series of events "where the other guy wins who isn't supposed to win." 

In the software world, a typical memory race condition occurs when the memory arbiter is instructed to overwrite an older block of memory, but write the old block of memory to somewhere else in cache.  In the instance where two arbiters follow this same rule set, its easy to see how a race condition can occur: both arbiters attempt to overwrite the same blocks of information, resulting in a deadlock.

From what AMD engineers would tell DailyTech, this example is very similar to what occurs with nested memory pages in virtualized machines on these K10 processors. 

AMD has since released a new BIOS patch for all K10 motherboards, including the often cited but rarely seen MSI K9A2 Platinum.  This patch, confirmed by DailyTech, will result in at least a 10% reduction in general computing speed. 

AMD partners tell DailyTech that all bulk Barcelona shipments have been halted pending application screening based on the customer.  Cray, for example, was allowed its latest allocation for machines that will not use these nested virtualization techniques.  Other AMD corporate customers were told to use Revision F3 (K8) processors in the meantime. 

The TLB erratum will be fixed in the B3 stepping of all AMD quad-core processors, including Phenom and Barcelona.  However, AMD considers the B3 stepping a "March" item on its 2008 roadmap.  Processors shipped between then and now will still carry the TLB bug, though with the BIOS workaround these machines will not experience a lockup. 

The delayed Phenom 9700 is affected by the TLB bug, though AMD insiders tell DailyTech the upcoming 2.6 GHz Phenom 9900 is not affected.  This indicates Phenom 9900 will carry the B3-stepping designation.

AMD's latest roadmap hints that its tri-core processors are merely quad-core processors with one core disabled. The company also indicated that it will introduce some of these tri-core processors with the L3 cache disabled.  Removing the shared-L3 cache from the chip design eliminates the TLB bug.

In a likely-related event, AMD's newest corporate roadmap scheduled three Phenom processors for the first half of 2008; one of which is the Phenom 9700.  The company will launch eleven new 65nm K8 processors in the same time period.


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Erratum is nothing new
By crystal clear on 12/6/2007 7:55:20 AM , Rating: 2
quote:
Erratum, to those in the hardware or software industry, is a nice way of saying "we missed a test case" during development and design.


No ! it should read this way - "We skipped a test case"

Yes sir the word "skipped" is the source of the problem,from AMD to Vista to Vista drivers to O.S Leopard & more & more.

Why "skipped" is the issue here - its because of T.T.M.

Time to Market pressures compel companies-either they have to meet their announced product release date deadlines or due to already delayed past their expected launch dates.

The motherboard manufacturers & OEMs exert intense pressures on them to meet their own(OEMs)product planning/ production/marketing schedules.

Time to Market is given priority number 1 over

engineering - but R&D staff need their time to develop/refine/test/verify etc their work.

The mad & desperate rush to the market results into issues that this article discusses & AMD unfortunately has to deal with.

The negative publicity generated is the consequence resulting in severe embarassment to AMD & creates a lack of confidence in AMD & for OEMs .

The net result - Sales revenues take a major blow.

Even Intel had these issues/glitches to deal with when it released the Intel Core 2 processors & subsequently issues a bios update.

Barcelonas/Phenoms don't all go into gamer machines. People need this stuff to work."

Examples-

Previously you had B.S.O.D. now you also get P.S.O.D. rather "Purple Screen of Death" .

Read this-

Vista's Purple Screen of Death

http://neosmart.net/blog/2007/vistas-purple-screen...

The negative/bad publicity created for AMD is serious issue/problem for AMD.
Investor confidence is taking a deep dive douwnwards,Sales revenues will take a serious blow,Bad quaterly results way into 2H 08 atleast.

We need AMD just as much as we need Intel.......




RE: Erratum is nothing new
By crystal clear on 12/6/2007 8:32:10 AM , Rating: 2
I remember very well I made a post sometime ago about-

IBM touted the 1.9GHz Opteron-based System x 3455 as a marvel, running the box through the SPEC CPU2006 suite. And now, just a few weeks later, IBM has flagged its benchmarks as non-compliant because it cannot get the systems to customers in a reasonable amount of time.


http://www.spec.org/cpu2006/results/res2007q3/cpu2...

IBM knew about this problem we are discussing now way back months ago.

I had the doubts/suspicions when I read the link above that time months ago,as its not manufacturing rather flaws that IBM discovered in their own testing & passed them to AMD.

IBM is actively involved with AMD in their development work & testing etc.

When IBM doesnt sell (Barcelona based systems)means its serious trouble/problems etc-IBM gets first priority in supply of CPUs over other OEMs from AMD.


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