AMD hopes to change that with the release of its new Phenom processors. MSI was the first mainboard manufacturer to announce an RD790 mainboard, the K9A2 Platinum, for the quad-core and tri-core Phenom's. Mainboards from ASUS and Gigabyte based on RD790 were announced in October and also support Phenom quad-core processors.
More details of the AMD platform launch that included the Phenom, the RD790 chipset and the RV670 graphics processor surfaced early in November. DailyTech reported early in November 2007 on the pricing structure of the Phenom processors ranging from about $280 to $330 USD.
An AMD internal memos hows the AMD Phenom 9700, 2.4 GHz processor is slated for mid-December availability. Allocation for the Phenom 9600 running at 2.3GHz has been pushed back to a Q1 2008 date.
The Tech Report, in an interview with AMD's desktop product marketing manager Michael Saucier, confirmed an erratum for all Phenom processors that will cause the system to hang due to an L3 cache miss. The Tech Report claims this fix will degrade performance as much at 10%.
The mainboard favored by AMD, the MSI K9A2 Platinum is impossible to get currently since it is out of stock. MSI confirmed to DailyTech that this board will start shipping again next week, and that the board itself is not with any defect, but just in high demand and low availability.
quote: AMD has stated publicly that the workaround can lower performance by as much as 10%, although one source characterized the performance hit to TR as 10-20%.
quote: Saucier clarified the exact nature of the workaround for the erratum that AMD has provided to motherboard makers and PC manufacturers. The fix comes in the form of a BIOS update, and this BIOS patch includes an update to the CPU microcode. This update disables the portion of the chip's TLB logic that is problematic. Saucier noted that the L3 cache "still works" with this logic disabled, and he said AMD has no plans to implement the fix for existing chips in a different way.
quote: Incidentally, the presence of the TLB erratum may explain the odd behavior of AMD's PR team during the lead-up to the Phenom launch, as I described in my recent blog post. The decision to use 2.6GHz parts and to require the press to test in a controlled environment makes more sense in this context. Since 2.6GHz Phenoms, when they arrive, should be based on the B3 revision of the chip with the TLB erratum fix, AMD could justifiably argue that their performance won't be limited by the BIOS-based workaround. Saucier confirmed to us that the test systems at the Tahoe press event did not have the workaround enabled.
quote: It's unfortunate, they (AMD) must have rushed it (PHENOM) a bit