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AMD has something for everyone with its new tri-core processors, but quite a lot is still marked "tentative"

AMD picked up big headlines the day before Intel's Fall Developer Forum with the announcement of its upcoming tri-core processors. 

AMD's original release did not specify if this tri-core processor, code named Toliman, would be a totally new processor or merely a stripped-down version of the existing Agena core. The answer, it appears, is both.

In an embargoed corporate roadmap forwarded to DailyTech, details of these new triple-core oddities came to light.

The first triple-core processor, Toliman, is essentially a core-disabled version of the Agena quad-core processor. It includes a full Agena package, including the 2MB of shared L3 cache, with one core disabled.

Toliman, which will eventually herald the AMD Phenom 8000-product name, is scheduled to launch in February 2008 with mass availability in March.  AMD representatives, speaking on conditions of anonymity, confirmed the initial  2.4 GHz Phenom 8700 and 2.3 GHz Phenom 8600 tri-core processors will launch with a 95W thermal envelope.

In late 2008, AMD will shift almost all of its 65nm quad-core offerings to 45nm.  AMD will then follow up these initial quad-core offerings with 45nm dual-core and triple-core processors in 2009. 

The first of these 45nm tri-core processors, codenamed Heka, will launch with DDR2 and DDR3 support.  However, AMD guidance also details that Heka will ship with two different varieties: one with a shared L3 cache, another without.  All 45nm quad-core AMD processors incorporate shared L3 cache, with the exception of the Propus family processor.

AMD guidance goes on to state that all mainstream Phenom quad-core processors, both with shared L3 cache (Deneb) and without (Propus), shipped in 2009 will feature DDR3 exclusively.  Heka, on the other hand, will feature a mix of DDR2 and DDR3 support.

Unfortunately the answers for tri-core only raise further questions.  While Heka has a unique codename, it seems to be a combination of cut-down Deneb and Propus quad-core processors. The logical conclusion would be that Heka is merely excess or defective Deneb and Propus processors from the 2008 launch. 

Yet AMD's roadmap goes on to detail one more chip: RegorRegor, which has always been described by AMD as a dual-core version of Deneb, will make its debut with variable shared L3 cache and a mix of DDR2 and DDR3 support. Could it be that Regor is a core-disabled version of Heka, which is already likely a core-disabled version of Deneb/Propus?

One AMD representative declined to comment on these 45nm processors, stating that 2009 processor launches and specifications are still "tentitive."

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RE: Three cores?
By StevoLincolnite on 12/4/2007 5:08:01 AM , Rating: 2
All the "Problomatic" parts have been disabled, besides remember the celeron 300A? Those were just Pentium 2's with the L2 cache disabled because if defective wafers, still didnt stop Intel from selling them in droves, why? Good performance at the time at a rather cheap price... And they were an over clockers wet dream.

All you're graphics cards, For Instance the Geforce 6200, is basically the Geforce 6600, nVidia just disabled the pipelines, either because they were problematic, or wanted to sell more lower end gear, still gamers didn't really notice the difference in quality or stability.

The product hasn't been broken, more like... Features disabled in order for people who can't afford something better something to buy, And sometimes... They are actually good performance for you're dollar.

AMD sometimes with the Athlon 64, Adjusted Clockspeeds and cache, for instance there is actually several different types of the Athlon 64 3200+ all with different clockspeeds and cache, ADM just used a higher-end part, disabled the problematic cache and sold it off as a lower end part, processor still works fine, stability is still 100% and it benefits the consumer as there is more stock thus more competition and thus more sales and cheaper prices for the consumer.

"If something isn't broke why fix it" -Term apply, they are all working, just lower in specification in order for it to be fully operational.

If there were problems with the processors themselves they would be recalled, (Like the Pentium 3 1.13ghz back in the day).

RE: Three cores?
By wetwareinterface on 12/4/2007 9:07:17 AM , Rating: 2
actually the celeron 300a was nowhere near a pentiumII with cache disabled. the pentium II had the l2 cache running at half the cpu frequency because it was external to the die. it was 4 way set assosciative also. the celeron cache was internal to the die, ran at cpu frequency, and was 8 way set assosciative. it was a precursor to the pentium III "coppermine". the coppermine upped the cache ante by going 16 way set assosciative and having 4 times as much cache as the celeron 300a. the 300a also had 2 cache areas, one was always disabled to improve yields. it looked like the 300a was going to be the pentium III but intel decided to go a different route and reuse the pII manufacturing process to extend the life of the process and make more money off it. later they redid the pIII as the coppermine and just basically bumped up the celey specs to the coppermine ones.

RE: Three cores?
By StevoLincolnite on 12/4/2007 9:46:42 AM , Rating: 2
The Precursor to the Coppermine was the Katmai, not the Pentium 2 Destchue
And the early Celerons had no Cache.

RE: Three cores?
By Pneumothorax on 12/4/2007 9:20:32 AM , Rating: 2
All the "Problomatic" parts have been disabled, besides remember the celeron 300A? Those were just Pentium 2's with the L2 cache disabled because if defective wafers, still didnt stop Intel from selling them in droves, why? Good performance at the time at a rather cheap price... And they were an over clockers wet dream.

The 300A's were the "wet dream" of oc'ers. BUT you're mentioning the original Celeron 266/300. Which basically was a PII cartridge without the L2 external half core speed cache. The Celeron 300 A actually came out with an on die full speed L2 cache which preceded the Pentium 3 which finally integrated an on die L2 cache in later revisions.

RE: Three cores?
By StevoLincolnite on 12/4/2007 9:54:53 AM , Rating: 2
Yeah, I realized that error after I posted, cheers for clearing it up :) Even the origional Celerons with no L2 cache were excellent overclockers though.
And it was the Covington Celerons with no L2 cache which were the Pentium 2 Deschutes derivatives, not the Mendocino.

Still, that wasn't the point of my earlier post.

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