Gearing Up for "Nehalem" Sockets
November 28, 2007 6:31 PM
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Intel partners reveal plans for new processor socket designs
In a memo copied to
, Intel partners recently discussed details regarding Intel's next-generation socket designs.
next-generation processor family
, integrates the memory controller directly onto the processor die -- a feature already standard on AMD's K8 and K10 core architecture.
Where companies traditionally increase pin count for new processor designs, Intel's LGA715 (also dubbed Socket H) will actually decrease the amount of pins from 775 to 715. Since the memory controller will reside on the processor,
processors no longer need the additional signaling from the processor to the Northbridge.
Guidance released to Japanese
claims this new desktop socket will actually utilize a
1160-pin LGA1160 design instead
. Intel officials would not reveal exact pin count details.
LGA1366, on the other hand, will greatly increase the pin-count for cross-CPU communication via Intel's QuickPath Interface. AMD increased its pin-count for server chipsets when it migrated from PGA940 to LGA1207 design last year.
processors will use Registered DDR3 memory; desktop processors will utilize the unregistered variant. While not electrically compatible with DDR2, DDR3 still uses 240 pins for signally thus eliminating the need to increase pins on account of the system memory.
As one Intel engineer who agreed to speak on conditions of anonymity put it, "We try to reduce the pin counts as much as possible to eliminate cross talk and other interference." He adds, "But we do try to leave some pins for overhead and future use."
-based CPUs will use Intel's second-generation land grid array (LGA) design. The use of "pins" in context of the land grid array is a bit of a misnomer as the processor interfaces with the socket design via pads rather than pins. This LGA design is recognized by both AMD and Intel for its ability to increase "pin" density and durability.
Corporate roadmaps from Tyan and Supermicro both detail LGA1366 designs for sampling by the end of Q2 2008. Desktop LGA715 variants, on the other hand, won't see mass production until the second half of 2008, with a target launch of Q4 2008.
Intel guidance slates
chipsets for a Q3 2008 launch
chipsets using the LGA715 design are on the record for Q4 2008.
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RE: Correct me if I'm wrong please.
12/2/2007 4:18:25 PM
How is AM3 backward compatible with AM2+? The memory controller is on Die so maybe that is not and issue, both DDR2 and DDR3 have 240 pins but are keyed different so there would have to be different memory sockets on the board right? Also with the controller on the CPU doesn't that mean that with different signaling and timings between DDR2 and DDR3 you couldn't have the same CPU socket using the same traces for the different standards could you?
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