backtop


Print 78 comment(s) - last by Martimus.. on Nov 21 at 2:05 PM

New sockets, chipsets and architecture en route from Intel before 2009

Nehalem will likely be the most aggressive processor architecture in Intel's portfolio since the original Pentium. With the launch of the Core architecture, the company announced its tick-tock strategy: design new architecture, then shrink the process node.  Rinse and repeat.

Tick-tock is alive and well as Intel's corporate roadmap reveals additional details about its desktop iteration of 45nm quad-core Nehalem, dubbed Bloomfield.

Nehalem will be fundamentally different from the Core architecture for no less than two reasons. The company will move the memory controller from the core logic on the motherboard to the processor die.  This tactic has been a cornerstone for the AMD K8 architecture since 2003.

In addition, Nehalem will also feature a new bus interconnect, currently dubbed Quick Path Interconnect.  This new interconnect behaves very similar to HyperTransport, currently used on all AMD platforms since K8.

A new bus and memory controller means a new socket design. Existing motherboards are not compatible with Nehalem-based processors.  The new desktop socket, labeled LGA1366, will completely replace the existing LGA775 interconnect. 

The company will replace the X38 and yet to be announced X48 desktop chipsets with the Tylersburg chipset family and ICH10 southbridge for these first LGA1366 motherboards. 

Corporate guidance also suggests the company will likely ditch all DDR2 support in favor of DDR3, at least on the high end platforms.  All Bloomfield processors will feature support three DDR3 channels.

However, not everything is known about Nehalem just yet.  Corporate guidance suggests Bloomfield will feature a new revision of Hyper-Threading.  Although each Bloomfield features four physical cores, the processor will dynamically allocate additional threads -- Bloomfield computers will detect eight logical cores.

Bloomfield will feature less cache than Intel's high-end 45nm Penryn offerings slated for release between now and Q4 2008.  However, unlike the 12MB L2 cache featured on Penryn, the 8MB L3 cache on all Nehalem offerings can be shared between all four on-die cores.

Intel's highest-end Bloomfield processors will feature a 130W thermal envelope.  Extreme Edition Penryn processors, the first on the 45nm node, have a thermal envelope that tops out around 136W.  Intel's Q9550 processor (2.8 GHz, 45nm quad-core) sports a 95W TDP.

Paul Otellini, Intel CEO, boldly announced that Nehalem as "taped out" at the Intel Developer Forum last September.  The tape out designates when a design team has moved from the design to working samples. 

At both Intel and AMD, the tape out comes approximately one year before the actual launch date.  True to tick-tock, Bloomfield's debut will also come one year after the 45nm node launch, or Penryn.


Comments     Threshold


This article is over a month old, voting and posting comments is disabled

RE: IMC
By crystal clear on 10/27/2007 7:18:45 AM , Rating: 1
Here is a portion of an interview-

One of the most notable additions to Nehalem is its QuickPath architecture that includes an integrated memory controller. Can you tell us more about that and how it compares to Advanced Micro Devices' DirectConnect architecture?

In the spring of last year, Steve Pawlowski [an Intel senior fellow] gave a talk about tech insight and that question of an integrated memory controller came up, and I think Steve said accurately that we were perfectly aware of integrated memory controllers and we [Intel] had developed integrated memory controllers and we have killed more designs with integrated memory control than AMD has built, so our view was that integrated memory control was not required to deliver high performance.

I think the press began equating integrated memory control with high performance, and I think with Core 2 we retained the front-side bus architecture and we beat the pants off of everybody without the integrated memory controller. The argument was that it was an engineering decision and at some point it will make sense to integrate the memory controller, and when that happens we will. We looked at that trade-off with Nehalem and we decided for that generation it made sense.


The analogy I use is to look at the copper microprocessor used in [IBM's] PowerPC. They never delivered a microprocessor that even ran at half the clock speed of the then-available Intel processor. So if copper was so almighty important, why didn't it deliver? The metallization technology was not the determining factor of chip performance at that time. The transistors needed to get faster before the wires got faster. IBM made the wire faster but not the transistors, so it was like having a Formula One car between stoplights. We have copper technology and we worked on it for many years, and then we decided that the transistors were running fast enough to make the wires run faster. We then put copper into production, but we didn't deploy it until we needed it.



http://www.eweek.com/article2/0,1895,2185714,00.as...


"So if you want to save the planet, feel free to drive your Hummer. Just avoid the drive thru line at McDonalds." -- Michael Asher

Related Articles
Intel X48, P45, G45 Turn Corporeal
October 26, 2007, 10:45 AM
Intel Preps 45nm Quad-core Desktop Launch
September 28, 2007, 4:44 AM
"Nehalem" Taped-out and Running Windows
September 18, 2007, 12:04 PM













botimage
Copyright 2014 DailyTech LLC. - RSS Feed | Advertise | About Us | Ethics | FAQ | Terms, Conditions & Privacy Information | Kristopher Kubicki