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Coming to a processor near you in 2009

AMD today announced its new x86-instruction set to improve performance in everyday computing tasks and applications – SSE5. AMD’s new SSE5 instruction set aims to improve performance in high-performance computing, or HPC, multimedia and security applications.

The new SSE5 instructions are available to developers today, but will not make it into AMD products until next-generation Fusion architecture with Bulldozer CPU cores. AMD announced the new instructions long before it would make it into processors “to foster an industry dialogue and solicit feedback,” continuing with the company’s open collaboration philosophy.

AMD’s SSE5 includes the following new instructions:
  • 3-Operand Instructions A computing instruction is executed by applying a mathematical or logical function to operands, or inputs. By increasing the number of operands an x86 instruction can handle from 2 to 3, SSE5 enables the consolidation of multiple, simple instructions into a single, more effective instruction. The ability to execute 3-Operand Instructions is currently only possible on certain RISC architectures.
  • Fused Multiply Accumulate The 3-Operand Instruction capability enables the creation of new instructions which efficiently execute complex calculations. The Fused Multiply Accumulate instruction combines multiplication and addition to enable iterative calculations with one instruction. The simplification of the code enables rapid execution for more realistic graphics shading, rapid photographic rendering, spatialized audio, complex vector mathematics and other performance-intense applications.
Intel declined to comment on AMD’s new SSE5 instructions, nor revealed if the company plans to integrate the instructions in the future.

“We have no reason to talk about 2009 plans, theirs or ours. We love what we're doing today with processors, instructions, chipsets and software tools,” Intel public relations manager Dan Snyder said. “We've already released new SSE4 instructions that we have shown to give huge benefit to video and multimedia, and is already available to ISVs with Penryn family samples.”

SSE4 extensions have already been spotted in the wild on leaked Intel Penryn processors. SSE4a, a subset of SSE4, will make an appearance on AMD's Barcelona architecture, set to debut on September 10th, 2007.  AMD has not disclosed when or if it plans to roll out the full SSE4 extension package.

Expect AMD to release processors featuring SSE5 in 2009 with Bulldozer equipped processors such as Sandtiger.

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Forked up instruction sets
By Spyvie on 8/30/2007 4:35:20 PM , Rating: 3
Hopefully AMD will employ SSE4 on it’s processors, and Intel will adopt SSE5 if it proves to be beneficial.

Otherwise, we need the equivalent of the D.O.T. to step in and ensure standards are accepted and adhered to.

RE: Forked up instruction sets
By Spyvie on 8/30/2007 4:37:03 PM , Rating: 2
Ok, I should work on my comprehension, it says right there that AMD will adopt SSE4

RE: Forked up instruction sets
By JackBeQuick on 8/30/2007 4:38:21 PM , Rating: 2
In a way you're still right. AMD's SSE4a instructions are only a subset of SSE4 (SSE4.1 as Intel calls it). I don't know what the logic to this approach is by AMD.

RE: Forked up instruction sets
By mmarq on 9/1/2007 2:53:02 AM , Rating: 2
If nothing else considered, like a sure Fusion connection, because many of those instructions bare a strong resemblance with ATI GPU ISA... Fusion AT the ISA level!...

... the fact that they are most of them 3operand SMID MADD instructions, would make them far far superior to the SSE4. That is, what would take 2 instructions in SSE4 to compute, will only take 1 instruction in SSE5 for a similar operation.

Liking or not, but its fact that SSE5 is far superior to SSE4, and i see no alternative to Intel but to adopt them, or came forward with something similar. The same situation when AMD introduced AMD x86_64.

RE: Forked up instruction sets
By omnicronx on 8/30/2007 4:42:11 PM , Rating: 1
Thats not what hes getting at, will Intel adopt SSE5 is what hes asking. Intel has essentially come up with every instruction set so far (SSE-SSE4) and AMD has usually been an instruction behind. Its nice too see AMD is finally stepping into the forefront. I for one am glad, It's about time someone other than Intel got to decide things.. it will be a shame if they don't adopt it and pure B.S in my mind.

RE: Forked up instruction sets
By soydios on 8/30/2007 5:00:20 PM , Rating: 4
The AnandTech article reminds us that AMD designed the x86-64 architecture that my Intel E6600 is using to run Vista 64-bit right now.

RE: Forked up instruction sets
By omnicronx on 8/30/2007 6:49:50 PM , Rating: 2
Different scenario, here intel didnt have a choice nor is it an SSE instruction set. As i said historically intel has come up with all the SSE instruction sets, so it would be interesting to see if they will implement it, or if it will be left for the server market. Remember without software to take advantage of these instructions, (if intel decides not to implement it will anyone write any software to take advantage of said instructions) they mean absolutely nothing performance wise.

RE: Forked up instruction sets
By Oregonian2 on 8/31/2007 1:41:45 PM , Rating: 2
Intel certainly did have a choice, and they originally chose another non 32-bit compatible path for 64 bit "upgrades". You're only right in that they didn't have a choice in the sense that AMD led the way and the market forced Intel to change their strategy despite their original denials that they were going to follow AMD and do what they did.

It's the very same scenario with the addition of compatible instruction extensions and whether the market forces compatibility or not. Only difference is that the 64-bit mode was a lot bigger set of added instructions than the SSEx or AMD-NOW! sets. Fundamentally the same thing.

RE: Forked up instruction sets
By sdsdv10 on 8/30/2007 11:55:08 PM , Rating: 2
Intel has essentially come up with every instruction set so far (SSE-SSE4) and AMD has usually been an instruction behind.

Didn't AMD try a similar thing with 3DNow!!

From what I understand, it simply wasn't picked up and used by software writers.

RE: Forked up instruction sets
By subhajit on 8/31/2007 4:09:04 AM , Rating: 3
"From what I understand, it simply wasn't picked up and used by software writers"

My PowerDVD seems to use 3dNow and 3dNow Pro.

By Crank the Planet on 8/31/2007 2:29:47 PM , Rating: 3
And I think the failure of software companies to adopt these intruction sets was first felt by intel- MMX anyone?

Also, has there been widespread adoption and implementation of SS3?

RE: Forked up instruction sets
By RW on 9/1/2007 5:41:18 PM , Rating: 2
It's so obvious but nobody seems to notice that Intel+NVIDIA=AMD

Any Copyrights on the SSE name?
By ltcommanderdata on 8/30/2007 5:00:47 PM , Rating: 3
I was wondering whether there are any copyrights to the SSE and MMX names that Intel owns? SSE was originally started as a polarized opposition to 3DNow!, but I think having both Intel and AMD developing something dubbed "SSE" without a unified standard will get very convoluted very quickly. Like an SSE4a that appears to be a superset of SSE4 but is actually exclusive and SSE5 being only a partial superset. I can only imagine what would happen if Intel decided to label their next instruction set "the real SSE5" or introduce a SSE6 that completely skips over AMD's SSE5.

You know, one of the things I've found interesting is how there are little things that Intel and AMD are doing can be viewed as appealing to Apple. Intel's Penryn for example has their Super Shuffle Engine which improves SSE packing, unpacking etc. which can be viewed as an attempt to meet the functionality of the Vector Permute Unit in the G4e and G5. Similarly, the move to 3-operand SSE also seems like an appeal to Altivec programmers.

RE: Any Copyrights on the SSE name?
By phattyboombatty on 8/30/2007 6:52:58 PM , Rating: 3
AFAIK Intel and AMD entered into a mutual licensing agreement that allowed AMD to use SSE instructions. AMD agreed to allow Intel to use any SSE instructions that AMD came up with and Intel agreed to allow AMD to use any SSE instructions that Intel came up with. That way, both companies could benefit from the instruction sets that either invented.

RE: Any Copyrights on the SSE name?
By mars777 on 8/31/2007 1:08:57 AM , Rating: 3
Well being a shared dual licensed technology is good.
Anyone of the two can come up with a new instruction, and the other can implement it. I don't see anything wrong in that.

What the majority of people here care is whether will this lead to a lawsuit or not.

I personally don't care as long as this is good to the industry. I wouldn't want AMD to have 3dNow 24 and some SSE-s and Intel to have SSE 25 and some 3dNow-s.

I want them to converge.

That said i think Intel will fightback in court or not implement SSE5 since they are far back with GPGPU in their cores, and even if they implemented instructions with three operands they would be slow as hell.

This is more AMD saying to Intel:

"Well, you can do a fast core with a lot of cache on industry leading nano scale, but can you integrate efficiently parallel execution of complex data on the core?"

And it is a bold stance to say something like that when they are struggling to live ;(

RE: Any Copyrights on the SSE name?
By Khato on 8/31/07, Rating: 0
RE: Any Copyrights on the SSE name?
By BVT on 8/31/2007 10:27:18 AM , Rating: 2
Surely, there was a cross licensing use of the SSE name. They get to tag their chips with SSE 1-3 now.

As far as the subset of 4 is concerned, the AMD usage of SSE3 is also a subset. AMD did not implement hyperthreading so they did not use the full SSE3.

With the elimination of the northbridge underway, there will soon be instruction sets for each bus implementation, HyperTransport & CSI.

While all this talk of instruction sets is interesting, why wont they eliminate the 16 bit and before backward compatibility in the processors? That could really open up the field for the processor and software improvements.

RE: Any Copyrights on the SSE name?
By johnsonx on 8/31/2007 11:53:48 AM , Rating: 2
why wont they eliminate the 16 bit and before backward compatibility in the processors?

They did. In 64-bit modes, the 16-bit and real mode stuff all goes away. That's the source of some of the 64-bit Windows software incompatibility headaches: there's still some legacy 16-bit stuff floating around. A common case is a older 32-bit program that would probably run ok on 64-bit Windows IF you could get it to install, but you can't because it uses an even older 16-bit installer program.

A CPU generation or two from now, I suppose it's possible we might start seeing 64-bit only x86 processors. Existing 64-bit designs are evolved from 32-bit designs, but a new 'from-the-ground-up' redesign could simply leave out all the legacy stuff. Presumably AMD eliminated legacy support from the x64 modes for precisely this reason: to open the possiblity for future processors to completely shed all legacy support.

We probably need a 64-bit only version of Windows to be released before such a processor becomes market viable though.

RE: Any Copyrights on the SSE name?
By mars777 on 8/31/2007 12:09:36 PM , Rating: 4
There is far more than just OS support.

An X86 processor REQUIRES to run in 16 bit mode.


Well, BIOS for the first one.
BIOS is a PROGRAM a CHIP. A 16 bit program on a chip(eprom) that has around 1-2 MB. Its duty is to instruct the processor how to set-up and btw an X86-64 processor cannot boot in 64bit mode. If you want to drop 16b compatibility better ask motherboard manufacturers first... then CPU manufacturers.

By johnsonx on 8/31/2007 3:31:43 PM , Rating: 1
Actually I started a follow-up post mentioning that EFI would have to be fully implemented by then as well, since BIOS as we know it requires real mode, but then decided not to bother since that would be obvious to anyone who cares. Thank you for pointing out the obvious.

RE: Any Copyrights on the SSE name?
By Crank the Planet on 8/31/2007 2:38:48 PM , Rating: 2
We probably need a 64-bit only version of Windows to be released before such a processor becomes market viable though.

Or Linux ;P

RE: Any Copyrights on the SSE name?
By mmarq on 9/1/2007 5:49:53 AM , Rating: 2
They don't need to get rid of nothing yet, to make more room for more instructions. There are still plenty of possibilities in x86_64 ranges. Even so, that an extension to 32 "physical" INT ISA registers are possible (i believe) without the need to get rid of any 32 bit stuff yet.

Original x86 32bits instructions, still used unchanged, where only 89.

New instructions with the variations in SSE 5, are 170 !! and they include some Integer instructions also. So is a real BIG PUSH, and all those instructions are 128 Bit !!

IF you consider that the rest of the SSE 1-4 pack, then there maybe near 300 or more 128 bit instructions!..., we may say with very good logic that the next wave of processores, specially from AMD(considering SSE5), are mostly 128 bit number crunching processores and not 64 bit, using more than any other register set, the architectural "16" 128 bit registers of its SSE microarchitecture.

This must as it seems, be related with Fusion, that is positioned to make CPUs to execute GPU workloads in the future, that are most of them made of 128 bit SMID instructions also. And OTOH, SSE 5 can also be made to be executed on Fusion GPGPUs!... for the world of Torrenza "accelerators"...

Thought for this denomination(64 bit CPU) it should count only the INT " registers " that are used for "program count" (PC), because those " registers " are the only ones visibles in the program ISA used by any program, and with instructions able to set all the others architectural registers, "16" SSE, and "8" FP. Those for "PC" are the ones used to control the program sequence and order, and so the quantity of addressable physical memory.
(slide 7)

And those in X86_64 are "16" 64 bit INT "physical" ISA registers. The "8" 32 bit INT registers(for 32 bit code) as a sub-set of the 64 bit ones are still there, as in that order of ideas so are the registers for the 16 bit code.

That is, the "Physical" registers are exactly the same, only use different opcode ranges for instructions. So the 32 bit ISA set of instructions only use the first 8 out of the 16, and occupy only 32 bits in those 64 bit physical registers, and so have also a less maximum of addresable RAM capability, 4 GB.

16 should have been exactly the same story... only that some of those opcode ranges possibilities (i believe) were used to make the 64 bit "16" "physical" INT ISA register extension possible. After that happened, a new world of so many more possibilities opened. But those ranges are no longer possibel.

If they have used other ranges, probably something of the 32 bit world would had ceased to function, but 16 bit would had been unchanged.

So these CPUs are 64 bit and will continue to be so, even with all the 128 bits "extensions" to the instruction set. So this kind of CPUs must be called 64 bit CPUs.

Not very likely, but somewhere down the road, beyond 2012, there can be a jump to x86_128!... then maybe some 32bit set of op-ranges will be used to make the extension, or other!... never say never, maybe there will be a need for exabytes of RAM!... we'll see!

(used a simplified logic, but believe the "picture" is correct)

By johnsonx on 9/2/2007 11:05:54 PM , Rating: 2
You're just saying the very long technical version what I posted above:

There just isn't that much of a transistor count penalty for supporting 32-bit to cause them to force the issue before then.

All I'm saying about abandoning 32-bit legacy support altogether is that they would remove the extra logic required to support it. Since it's all a subset of the 64-bit mode it isn't all that much, which is why they won't bother until all OS's are 64-bit. AMD must have wanted to do this though, else why did they leave certain things out of 64-bit mode if not to shed them entirely down the road? The 64-bit transition was a good time to break off some of the x86 legacy baggage.

Face Facts Everyone!!
By DannyH246 on 8/31/2007 9:57:59 AM , Rating: 3
Anyone who thinks Intel will use SSE5 is simply daydreaming. We all know what Monopolistic Intel is like.

If ever they were gonna use something that was developed elsewhere surely it should have been Hypertransport??

They definately would have been allowed to join the consortium if they'd have wanted to, but no they decided to spend millions developing CSI instead.

It didn't matter to them that everyone purchasing Xeons were buying into a system architecture that was almost 15 years old, because lost sales to tiny AMD was irrelevant yes??
Thanks to Opeteron they got that wrong didn't they?

I for one hope SSE5 is taken on board by everyone regardless of Intel. And just think, if theres a performance improvement using just these new instructions, how much of a boost will you get with Bulldozer. (i.e with execution units (from ATI) designed specifically for these new instructions)

RE: Face Facts Everyone!!
By murphyslabrat on 8/31/2007 10:32:01 AM , Rating: 3
Anyone who thinks Intel will use SSE5 is simply daydreaming. We all know what Monopolistic Intel is like.

3-operand operations, anyone? It doesn't matter if you have a GPU or not, in fact, this is part of the benefit of having a GPU: the massive parallelism. Only, here you have it in every computational process, as apposed to just those sent to the GPU portion. Also, undoubtedly, this is in preperation for the CPU-embedded GPU.

Worst case is: Intel copies AMD's concepts. AMD still innovates, as well as gets most of the commands they intended to be implemented.

Best case: Not only does Intel use and endorse, but also builds on AMD's fundamental ideas, thereby increasing the performance level available.

A final note: most of you AMD guys seem to think that Intel beating the pants off of AMD is a bad thing. Where did it come from? AMD beating Intel's pants off! I have always bought AMD, but I don't want a stagnantly better AMD, similiar to how Intel had been since the original 40386. You guys realize that this is one of the few times when Intel's primary architecture's IPCs were higher than all of the competition?

Correct me if I am wrong, I am mostly going off of wikipedia and other online sources, but as far as I know, since the K5, Intel has had inferior IPC performance(I am not talking about absolute performance, just CPU instructions per clock).

RE: Face Facts Everyone!!
By theapparition on 8/31/2007 2:41:32 PM , Rating: 1
but as far as I know, since the K5, Intel has had inferior IPC performance

While I agree with the rest of your post, this is an old and tired argument, doesn't matter which company you back. Yes IPC is a metric by judging a design's efficiency, but in the end, what you want is performance. FYI, Pentium 4's had lower IPC than Pentium 3's, but allowed them to clock higher. It was a very successful strategy which allowed them to dominate sales for most of the architectures's life.

I'm a big fan of efficiency, and higher IPC is always welcome. But in the end, I'll take a lower IPC chip that can render a scene in 1 minute, vs a "superior" design that takes 5 minutes.

The same argument for car engines as well. Hp/liter matters not, the only thing you care about is how much power you get and how much fuel it takes. Mazda's RX-7 used about the same fuel to make less power than competing models at the time, yet everyone marveled at how "efficient" it was. Stupid then, and still now.

RE: Face Facts Everyone!!
By murphyslabrat on 9/1/2007 1:01:05 AM , Rating: 2
I was remarking on a very interesting milestone for Intel. P4 or not, they never managed to get a decisive lead. They managed at most a 10% advantage over AMD, despite almost 40% higher clocks. Intel now has the same clockspeeds with a ~20% IPC advantage over the A64. probably something along the lines of 50-60% IPC over the p4.

I wasn't dissing Intel, I was lauding them. This is, as I said , an impressive milestone: Intel owns the town when it comes to absolute performance.

By cochy on 8/30/07, Rating: 0
RE: 2009?
By Dharl on 8/30/2007 4:47:42 PM , Rating: 2
Man even Intel was laughing at this announcement. They said it best when saying that they are happy with what their company was doing today.

When Intel was focusing on a release of Core 2 they were talking about how great the "future" would be. They obviously weren't happy with "today" back then.

Companies are going to say what they want to say to try and keep attention on them and whatever positive they have at that moment. Reminds me of Microsoft's constant "Content is King." comments everytime someone would bring up the RRoD error with their XBOX360.

Now with that said... AMD does need to do something. Release some information soon. I've been waiting a long time to build a new system. I've always bought Intel in the past and personally I'd rather go AMD this time around. I see them as a company to try and future proof their products. Intel is king now, and unless AMD does something soon it looks like I'll go with Intel yet again.

RE: 2009?
By Cygni on 8/30/2007 5:01:10 PM , Rating: 2
Uh, you mean besides the launch of thier first new design since the A64/Hammer? Besides that?

RE: 2009?
By Gravemind123 on 8/30/07, Rating: 0
RE: 2009?
By CrystalBay on 8/30/2007 11:50:07 PM , Rating: 2
Well with Larrabee set to be released in 2010 it makes a little more sense.

By HardwareD00d on 8/31/07, Rating: 0
By murphyslabrat on 8/31/2007 10:00:54 AM , Rating: 2
Uhm, lemme see...Nope. I think that AMD, in general, was very pleased. Not only was it a little bit humiliating for Intel to be forced to employ their solution(because they were unable to do their own in a timely fashion), but it also meant widespread support of 64-bit computing. 64-bit computing was greatly helped by the market leader fully backing it.

SSE4 vs SSE4a
By wretched on 8/31/2007 5:01:30 PM , Rating: 2
I might be wrong but my understanding of AMDs SSE4a is it is not a subset of intels SSE4 at all, it is more an extension to SSE3 with 4 new commands, and it is more the fact they both have a 4 in there name that leads one to think they have something in common.

Does anyone recall AMD64?
By Mitch101 on 8/31/2007 7:49:36 PM , Rating: 2
So Intel steals AMD64 and calls it EM64T then AMD steals SSE5 from Intel.

The bully takes the kids candy and the kid steals the bully's bike.

Kind of funny when you think about it.

Phenom X4
By crystal clear on 9/3/2007 3:00:02 AM , Rating: 2
Using the latest CPUZ 1.41 beta, we are able to detect Phenom X4 more correctly this time round. The package, process technology, multiplier and bus information are now available. The CPU revision is revealed as DR-B0. More importantly, the 4 cores of the Agena are now detected.

phoney launch BS
By whickywhickyjim on 8/31/2007 5:48:04 PM , Rating: 1
SSE4a, a subset of SSE4, will make an appearance on AMD's Barcelona architecture, set to debut on September 10th, 2007

I call paperlaunch BS on this. As much as I would like AMD to finally dump this product on the market, there are no motherboards out yet for this architecture. No Asus m3a, no MSI k9a2, no gigabyte whatever, no DFI whatever - no ATI/AMD 700 series boards are in the channel whatsoever. It's kind of hard to launch a product when there's no boards that support it. And that's probably because the chips aren't going to actually hit the market for quite some time.

By omnicronx on 8/30/2007 6:55:18 PM , Rating: 1
and why should intel be the only one allowed to come up with instruction sets that become the standard? 3dnow was nice, but it in no way was the standard for the time, it was a countermeasure for the original SSE. In my mind if intel is allowed to set a standard that everyone will use, why cant AMD? especially when Intel usually is one instruction set ahead of AMD for each refresh. I've personally always wondered this myself.

By AnonymousPoster on 8/30/2007 7:30:09 PM , Rating: 3
AMD can come up with their own instruction sets but why use and break Intel's naming convention? They should have called it 3DNow2 or something...

With SSE, every new version meant that you had backwards compatibility with the previous one. So if the processor supported SSE3 you also had SSE2 and SSE1 available not so with this "SSE5" unfortunately.

Intel will most likely skip it and go to SSE6...

By Zurtex on 8/30/2007 8:01:43 PM , Rating: 2
To be fair that's not entirely true, trivially, MONITOR and MWAIT instructions from SSE3 aren't supported on Conroe and beyond (though Nehalem might)

And I hear that AMD are hijacking the SSE6 name before Intel can, so they will either have to go with SSE5+, SSE5.1, SSE7 ¬_¬, etc...

By afkrotch on 8/30/2007 9:24:26 PM , Rating: 3
This is by far a great stupid move by AMD. You know they are simply going to use the SSE naming convention to try and get their own instruction sets used. I personally don't see this doing much of anything though.

Intel will probably counteract this by coming up with a new naming scheme for their future SSE instruction sets and will not support AMD's.

I don't even see the reason why AMD even bothers. AMD instruction sets barely even get used. Even their 64 bit instruction sets barely get used and Intel supports those. I say Intel should just dump those instruction sets and come up with their own. Then pay Microsoft like $100 million to support them in Windows.

What I'd like to see is a multicore different core proc. Like a quad core that sports a couple C2D cores and a couple Itanium 2 cores. With virtualization, you'd get the best of x86-32, x86-64, and IA-64.

By Zurtex on 8/30/2007 11:48:24 PM , Rating: 3
Would you enjoy a future where just 1 company ruled the CPUs entirely? I like having competition in a market, allowing it to be competitive, anything that gives AMD a shot in the arm, I'm all for. I don't want them to fall by the weigh side.

The naming convention, and lets be very honest hear, really only matters to geeks or people who are professionally involved in the tech industry. So they either have their facts right and are well informed, or they aren't which in the case of geeks is really their own problem generally and in the case of people who it professionally matters to, well they should do more research...

Seriously, even if SSE5 isn't adopted by anyone in programming, then it just stops Intel from monotonously releasing instructions under SSE that everyone has gotten used to. If you're offended or outraged by that, get a life.

By afkrotch on 8/31/2007 5:10:55 AM , Rating: 2
10 to 1 odds, you'd be pissed if Intel created a 3DNow2! You were probably pissed when Intel used the x86-64 instruction set and called it EMT64, instead of AMD64.

By Zurtex on 8/31/2007 10:14:44 AM , Rating: 2
Erm, no I wouldn't and no I really wasn't. In fact I found the whole x86-64 thing rather funny for the irony of it all.

Intel creates x86 instruction set, rather than building a better founding architecture, it artificially extends it from 16 bit to 20 bit. This allows backwards compatibility and because of the billions Intel can spend on R&D, starts killing off the competition, Intel then extends it to 32 bit. Intel sees that a better base architecture really would be better, so creates IA64. AMD extents the x86 set to 64 bits, AMD now has backwards compatibility, compared to Intel's slow emulation. AMD takes a huge advantage for a few years thanks to using the Intel tactic of spending lots of money on building a backwards compatible architecture rather than trying to think about what would actually be a better one.

I think it's good there are a common set of standards. In my opinion Intel and AMD should make a common open consortium completely dedicated to R&D of developing further open standards that both AMD, Intel or any other CPU company could implement without too much difficulty. I realise that's a bit of dream world, but that's what I'd hope for really.

By rcc on 8/31/2007 2:15:53 PM , Rating: 2
I think it's good there are a common set of standards

You are missing the point. There is no common standard in this. AMD took the name but did not meet the standard.

By Zurtex on 9/1/2007 3:42:03 PM , Rating: 2
... could you try and quote me more out of context and bring up a more irrelevant point?

Well Intel do exactly the same when they release new SSE instructions, so I don't really care that AMD are doing the same.

By murphyslabrat on 8/31/2007 10:46:36 AM , Rating: 2
About the EMT64, I fully agree with Zurtex, in addition I was actually excited when I heard about it. 64-bit support by the largest CPU supplier(by far) does not hurt anything for 64-bit computing, and things like that go past petty rivalry.

Mind you, I am currently running two AMD boxes. I went AMD on both of these because AMD was offering better bang for my price-range. And that is the ultimate consideration, as by the time you are ready to upgrade, a new socket or standard will be out, which will require a new motherboard.

For now, decisions like that will keep AMD alive, even in the face of better performance from Intel(unless their Allendale Pentium D's get any cheaper, at which point I will abandon said opinion)

By Targon on 8/31/2007 8:44:50 AM , Rating: 3
The AMD64 instruction set is being used by Intel under the name EM64. Intel didn't even give AMD credit for the instruction set that AMD designed and invented.

If you copy something from another company, credit should go where credit is due, and Intel should be slapped for putting a different name on AMD's invention, even if it was their own implementation.

3DNow! never really caught on, so it makes sense that AMD would not use that name again.

A big function of new instructions is to improve on processor designs by adding new instructions that make things easier to do or provide a speed improvement. The name really doesn't matter, what does matter is that AMD has been adding instructions that really do provide performance improvements.

Now, if AMD calling the new instructions SSE5 will cause software developers to support the new instructions, then it's a good idea. The real key is getting software developers to use what the GPU and CPU manufacturers provide. If there is software support, then Intel will implement the new AMD instructions. That's really all that matters, not what the name is.

By theapparition on 8/31/2007 2:46:58 PM , Rating: 2
If you copy something from another company, credit should go where credit is due, and Intel should be slapped for putting a different name on AMD's invention, even if it was their own implementation.

Even when you've signed a cross licensing agreement where either party can use either one's x86 IP?

By Screwballl on 8/31/2007 10:03:55 AM , Rating: 3
I don't even see the reason why AMD even bothers. AMD instruction sets barely even get used. Even their 64 bit instruction sets barely get used and Intel supports those.

really??? without the AMD64 (which Intel stole and renamed EM64T) allows your current 64-bit processors like Athlon64s, Conroes and others to use a 32-bit OS or a 64-bit OS on this proc. So how is it not used? It is used in millions of CPUs right now all because of AMDs innovation.

This is an excellent step in the right direction for AMD... stepping up and announcing possible changes or additions to current and future architecture. This is how they made Intel sweat for a good 2 years, now it looks like it may come again sooner than we think.

By murphyslabrat on 8/31/2007 11:20:15 AM , Rating: 2
This is how they made Intel sweat for a good 2 years, now it looks like it may come again sooner than we think.

How does a new instruction set, placed two years in the future, equal AMD being better? Two years is plenty of time to add SSE5 functionality to the Nehelam design, so Intel could just as well copy SSE5. Intel would be perfectly legitimate, just as they legitimately copied AMD64, and as AMD has legitimately used SSE1-3.

What this new instruction set means is universal betterness (yes I did just make that word up), and not Intel "sweating". What would make Intel sweat is if Barcelona/Agena turned out to be a monster-killer-robot-monkey-pirate-ninja from hell. And that is not really as far-fetched as it sounds, as many place great faith in the lottery:
n fiscal year 2003, total spending on lotteries was almost $45 billion, or $155 for every man, woman, and child in the United States.

While not explicitly stated, would you spend that much money on something you didn't believe in? and if only 50% of the population played the lottery, that means more like $310 per year(not counting other forms of gambling! Think about it, how much more enjoyment would they get if they instead rolled that into a new computer, TV, or other device(half of America could have an HD-DVD/BLU-Ray combo by now) every 2/3 years? Much more tangible and immediate benefit! Or, better yet, invest it and make some guaranteed money!

sorry about that off-topic rant, but gosh sakes, is the idea of winning a million-to-one chance really more believable than AMD pulling a tigger(yes, a double 'ger') out of a kitten sized bag? I appear to have started arguing with myself, so I will end it now

By Khato on 8/31/2007 1:40:14 PM , Rating: 3
Ahhhhh, the 64 bit extension to IA-32, a reason why anyone that dislikes windows should hate AMD.

Intel: We're finally going to get rid of all the overhead that IA-32 requires and start out fresh with a -good- instruction set.
Microsoft: But, all our code-base would be for naught. We can't just recompile and get acceptable performance if you do that. Other OS's could actually get a foothold...
AMD: Here you go Microsoft, a 64-bit extension to IA-32 that's all about backwards compatibility. Sure it offers basically no benefits, but everything you have works with it!
Microsoft: Woohoo. Windows lives on. Haha, have fun with that Itanium stuff, we sure won't support it now.

Yes, it's meant to be humorous, but you have to realize the truth that resides within. And don't try to justify AMD64 with either memory addressing limit or the abysmal performance gains they managed when in 64 bit mode - the xeons of the time already had 36 bit addressing, and the reason why Itanium is still around is because of performance.

By Oregonian2 on 8/31/2007 1:52:27 PM , Rating: 2
The market has had the choice to have everybody jump over to the wonderful new architecture of Itanium and leave AMD in the dust behind. Intel even once said that they were NOT going to take AMD's path and that Itanium was the answer.

So why hasn't Itanium taken over the world and the PC market? Why has even Intel reneg'ed on their denial of the x86 path to 64-bits even in their new generation implementations?

AMD had Intel'ized Intel with compatibility. Strangely enough the market seems to find compatibility desirable no matter how much of a mess it makes of the instruction set. Only assembly language programmers care (and compiler back-end folk).

P.S. - And I had done some x86 assembly language in the past, and yes it's a mess, but once back in C or C++ mode, didn't matter much to me. Compiler's problem.

By Khato on 8/31/2007 4:22:30 PM , Rating: 2
Ayup, I sure won't deny it. AMD took the low road and extended IA-32 because it's what made Microsoft happy. I would group all other software vendors in there too, but they don't hold anywhere near the amount of leverage.

There's equally no question it was a smart move by AMD. Without another 'option', Microsoft would have had to play nice with Itanium and it would be a large portion of the server market today. Heh, it's all the 'politics' of the CPU business.

But anyway, chances are that AMD's "SSE5" will flop nicely. After all, that lovely 64 bit extension of IA-32 that AMD forced upon us still has sub-par support four years after the first processors with it were released. Why will this be any better?

By Oregonian2 on 9/7/2007 7:38:27 PM , Rating: 2
Ayup, I sure won't deny it. AMD took the low road and extended IA-32 because it's what made Microsoft happy. I would group all other software vendors in there too, but they don't hold anywhere near the amount of leverage.

It's more than making all the vendors happy, it's also a matter of making all the people who own 32-bit software happy. Those who want to use all of their existing software on their new machine in a compatible fashion -- including 32 bit OS's. Their money speaks loudly as well (and it's their voices that made Intel the CPU power it has been over the years -- keeping things upward compatible).

By Marcus Pollice on 8/30/2007 10:20:13 PM , Rating: 3
What you are missing here is that MWAIT and MONITOR have a distinct CPUID flag. So even if they were marketed as SSE3 back then, they never really belonged to it. They were simply added with the same CPU core (Intel Prescott) and so Intel marketing created this illusion.

That being said, my Core 2 Duo reports supporting MWAIT / MONITOR. It makes sense as these instructions are not only helpful with Hyper-Threading but Multi-Threading in general. Only Single-Core CPUs with SSE3 and no HT lack these instructions as they are not needed in this case. The only CPUs where this description applies are AMDs Single-Core Rev. E/F CPUs and lately Intels Celeron 400.

By Zurtex on 8/30/2007 11:37:56 PM , Rating: 2
I'm really not missing that, I'm just being pedantic.

I really didn't know they'd still kept the instruction though on Core 2 Duo's, learn something new every day.

By CrystalBay on 8/31/2007 2:13:16 AM , Rating: 2
I thought AMD traded HyperTransport tech with Intel for the SSE3 instructions...

By JackBeQuick on 8/31/2007 4:38:51 AM , Rating: 2
HyperTransport is an open standard. Anyone can use it.

This is why you shouldn't read the inquirer.

By Targon on 8/31/2007 8:49:44 AM , Rating: 2
As I recall though, only members of the HyperTransport Consortium can use HyperTransport without paying royalties or license fees to the consortium.

Intel was not excluded from the consortium either, but rather did not want to support an AMD initiative.

By Kenenniah on 8/31/2007 2:33:15 PM , Rating: 2
Not really. Your analogy would make sense if AMD was making a processor named Core 3 Duo or something to that effect. Instead a more apt analogy would be a car company improving upon Fuel Injection and calling it Fuel Injection 2.

By rcc on 8/31/2007 4:20:22 PM , Rating: 2
you are picking nits, (and if you have some, go ahead).

Fuel injection is a general term. SSE refers to a specific set of specifications. It is closer to someone releasing an OS and calling it Solaris 11. (Assuming Solaris 10 is still the latest numbered version).

It causes confusion in end users, particularly the less informed. And it's just, well, .... tacky.

Actually, I can see a class action suit in AMDs future, end users that thought they were getting version 5 of Intel's SSE instruction set.

By Kenenniah on 8/31/2007 5:54:54 PM , Rating: 2
Hmm, fuel injection might have been a little too generic yes. My point wasn't to say that it wasn't possibly tacky and that I agree with the naming. Mostly that SSE isn't a product on it's own. It's a feature of another product. SSE is worthless without the rest of the whole package (the processor architechture etc.)

Actually your OS example is probably close, but an OS is also an full stand alone product. So to take the OS a littler further, my analogy would be Apple releasing OS XI with a web browser they call Internet Explorer 8.

By Kenenniah on 8/31/2007 5:56:25 PM , Rating: 2
And yes I'm picking nits, but not to argue or pick on you, but because I'm horribly bored at work and have nothing better to do at the moment :P

By rcc on 8/31/2007 6:23:00 PM , Rating: 2
How about Real releasing a player called Windows Media Player 12 for Vista.

It's all still tacky. If it stands, I'd expect to see Intel change the name completely with their next release.

By murphyslabrat on 9/1/2007 4:02:09 AM , Rating: 2
It's a bit like Chevy releasing a Thunderbird2.

A bit, but it is more like Chevy and Ford sharing designs, then Chevy designing a new engine design for Ford to use.

It is nowhere near the scale of Chevy calling a car of theirs Thunderbird 2. As has already been stated, to do such would be much more like AMD releasing Barcelona as Core 3 Duo.

How many ?proletariats?(for lack of a better word) could tell you what SSE is? Now, how much of the CPU market is in directly sold CPU's? Most of the market is in OEM sales, where SSE version is completely irrelevant.

Besides, Intel has full rights to this iteration of SSE , nothing underhanded, nothing vile, no fiscal profit gained. The only result is wide industry acceptance.

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