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Print 40 comment(s) - last by ceefka.. on Aug 31 at 5:51 AM

Three new Xeons added to the Q4 launch lineup

Intel’s latest roadmap reveals three new Penryn based Xeon models with a higher front-side bus speed – 1600 MHz. The three new 1600 MHz front-side bus processors are available in dual-core and quad-core models. Quad-core Xeon E5472 and E5462 are the first quad-core models to receive the 1600 MHz front-side bus treatment.

The Xeon E5472 features a 3.0 GHz clock speed while the E5462 features a 2.8 GHz clock speed. These models feature 80-watt thermal ratings as designated with the E moniker. Intel plans to release these 1600 MHz front-side bus processors in Q4 2007 with the rest of the Penryn family.

Pricing for the 1600 MHz front-side bus processor starts at $797 for the E5462 and $958 for the E5472, per processor, in 1,000 unit quantities. As far as pricing goes, the Xeon E5472 slots below the 3.16 GHz X5460 while the E5462 slots below the 3.0 GHz, E5450.

Intel has one 1600 MHz dual-core Penryn based Xeon processor ready for launch – the E5272. The Xeon E5272 features a 3.4 GHz clock speed and is priced at $1,172. Intel has also pulled in the launch of all dual-core Xeon processors to Q4 2007, with the quad-core processors. The dual-core Xeon E5260 and E5205 will also launch in Q4, not the Q1 2008 date earlier roadmaps showed.

Intel 1600 MHz front-side bus Xeon processors will drop into the upcoming Seaburg chipset. Seaburg features support for dual PCIe 2.0 x16 slots and up to 128GB of memory.



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By nerdye on 8/30/2007 1:18:18 AM , Rating: 2
The best ddr3 has more raw performance (although very small) over the best ddr2. Ddr2 had no performance gain at the time of its release over ddr1, atleast we should be thankful for that fact as enthusiasts. AMD has more bandwidth with their IMC? Well no sh__ sherlock! I applaud AMD for their great IMC setup, and I applaud Intel for their adoption of new technologies and driving the evolution of hardware. We can have our cake and eat it too if we appreciate technology as a whole with unbiased arms.


By bangmal on 8/30/2007 2:50:33 AM , Rating: 3
I dont want to slap you, but i cant resist.
you got to learn the difference between failing to implement it properly and implementing properly.
Intel tried and failed utterly, suck the cost and stick to the ancient FSB. AMD did it properly and then intel moving its ass and copying it. It is simple as that.


By zsdersw on 8/30/2007 7:31:51 AM , Rating: 3
That same concept.. of proper implementation.. applies to single-die quad-core too, where AMD appears to have run into some problems. Time will tell, but Intel may very well release Nehalem without any of the difficulties AMD had. Will you then sing the praises of proper implementation just as you are now?

Intel's approach to quad-core (MCM first, single-die later) appears to be properly conceived. Getting quad-core products out there, as soon as possible, gives more time and sets the stage for applications and software to take advantage of more cores. When the single-die quad-core product is ready the applications and software are already multi-core optimized or at least multi-core ready, making them all the more successful on the new architecture.


By ceefka on 8/31/2007 5:51:21 AM , Rating: 2
I wondered why AMD would not do the same as Intel with quad cores. The HT bandwidth and IMC should be quite capable of handling the additional traffic. They would have had a faster time to market in favor of bragging rights for it being native quad.


"Nowadays you can buy a CPU cheaper than the CPU fan." -- Unnamed AMD executive

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