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Basic MRAM operates by physically flipping the polarity of ferromagnetic plates - Courtesy IBM
MRAM is smaller and faster than ever before

Yesterday Toshiba and NEC announced two new products; High Density FeRAM and a new RAM technology capable of reading/writing at 200MB/s.  MRAM's largest hurdle since inception has always been competing with write speeds of traditional DRAM. 

The main advantage of MRAM over traditional DRAM or SRAM is that the bits do not require electricity to hold the data state.  DRAM and SRAM both require relatively amounts of electricity to "hold" the bit in place.  Thus MRAM runs on a fraction of the electricity the DRAM and SRAM require.

On the other hand, MRAM has, until now, required a significantly larger footprint than other memory technologies.  FeRAM, or Ferroelectric Random Access Memory, squeezes 64 megabits onto a single chip using 130nm interconnects -- but features the relatively slow cycle time of 60 nanoseconds.  FeRAM also requires much more power than traditional MRAM, but the product may become a moderate compromise between MRAM and DRAM in the future.  FeRAM kind of defeats the principle of MRAM because it uses electrical charges hold the polarity of the ferrous plates, rather than magnetic fields.

The lower density MRAM also announced yesterday also features 130nm interconnects with 240nm memory "cells."  Since this is true MRAM, the memory only requires 1.8V for read / writes.  Unfortunately, since the process is much bigger, the density for this MRAM is only 16 megabits per chip. 





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