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The bell tolls for "Nehalem" when Intel's clock strikes next in 2008
More details of Intel's next-generation architecture unveiled

Intel's "tick tock" development cycle continues to chime with the Nehalem processor architecture scheduled for production next year. Intel Senior Vice President Pat Gelsinger detailed the advanced features on the next-generation to DailyTech earlier today.

In the second half of this year, Intel will release its first 45nm Penryn-based processors.  While nearly identical architecturally to the Core 2 Duo processors released last year, Penryn's 45nm node allows Intel to put more L2 cache onboard; the company already announced Penryn-based processors will utilize up to 12MB of L2 cache on quad-core designs.

Intel's 45nm node utilizes metal transistor gates and high-k dielectrics.  The departure from silicon-based transistors translates to a 5-fold reduction in source-drain leakage and a 10-fold reduction in dielectric leakage.  According to Intel guidance, this means existing processors could run 20% faster just by switching to metal gate and high-k transistors.  Gelsinger claims mature Penryn processors will operate in excess of 3 GHz per core, with 1600 MHz front-side busses on server platforms.

After the 45nm shrink has matured, Intel will then incorporate architectural changes into its processor family, currently dubbed NehalemNehalem is still a 4-issue architecture similar to Core, but new advances in management and scalability give Nehalem its new micro architecture designation.

Earlier this year Intel roadmaps stated Hyper-Threading would appear on some Penryn processors.  Shortly after, Intel retracted the roadmap, stating that simultaneous multi-threading will not reappear until 2008.  This was made evident today when Intel unveiled its next-generation threading plans for Nehalem.

High-end server Nehalem-family processors have eight cores. Coupled with 2-way threading, these processors appear as 16 logical CPUs.  This threading is dynamic: Threads can be powered on and off depending on the application needs.

Dynamic threading isn't the only on-the-fly operation for Nehalem.  Almost everything about Nehalem can be dynamically managed: Power, threads, bus, cache and cores.  This management is primarily a power-saving feature, but also allows for saleable designs as well.

The bulk of these changes are possible due to Nehalem's on-board memory controller.  AMD realized the advantages of integrated memory controllers (IMCs) with the introduction of its Opteron series processors four years ago.  Intel has long toyed with with IMCs on some processors, and will even deliver the Tolapai system-on-a-chip later this year with an integrated memory controller.

Intel's dynamic bus, the Common System Interface (CSI), is clearly a focal point for the Nehalem architecture.  With many respects, CSI is very similar to HyperTransport: Variable, serial interconnects for processor-to-processor communication.  CSI will not only make its debut on Nehalem, but design engineers have also confirmed to DailyTech that CSI will have a large presence on next-generation Itanium platforms as well.

Intel leaves a single teaser in its Nehalem design guidance: "High performance integrated graphics engine for client."  Speaking on background, Intel insiders stated "The majority of the Intel Northbridge is already on the Nehalem die, so adding the final logic to include graphics is essentially [trivial] with the correct bus support."  Intel's renewed interest in graphics processing came just weeks after AMD made similiar announcements, which AMD has codenamed Fusion.

In addition, Intel will also expand the SSE4 instruction set.  Other architectural tweaks include shared multi-level cache.  AMD's upcoming Barcelona processors share L3 cache between cores; Intel's last NetBurst processors shared L3 cache, but no current Core processor utilizes such functionality.

Gelsinger emphasizes that Nehalem is on track for production in 2008.

Intel's "tick tock" strategy doesn't end at the 45nm node.  In 2009 Intel will optically shrink Nehalem process from 45nm to 32nm.  In a sense, it's the same move Intel is currently undertaking with the transition from Conroe to PenrynNehalem's 32nm shrink is dubbed Westmere.  The 32nm architecture that will succeed Westmere is dubbed Gesher.

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RE: P6 Core
By InsaneScientist on 3/29/2007 1:38:32 AM , Rating: 4
the 1.4 GHz PIII was ~ equivelant to a 2.66 GHz P4.

What are you talking about?

For general purpose stuff (in other words, anything but media encoding, which the P4 shined in from day 1) the P4 was slower than the PIII, but not by that much.

A 1.4GHz PIII would be roughly equivalent to a 1.8GHz Pentium 4.

AMD took the original Athlon architechure (not the Athlon XP) all the way to 1.4GHz, at which point they hit a ceiling. For a long time, though, Intel could not hit the same performance level with their P4. (It took about 6 months, IIRC) Finally, with the introduction of Northwood, its architechural improvements, and a clock speed of 2.0GHz, Intel overcame the Athlon @ 1.4GHz.

The Athlon was slightly more efficient than the PIII... so if a 2.0GHz P4 could beat a 1.4GHz Athlon, it could certainly beat a 1.4 GHz PIII. It wouldn't take a 2.66GHz P4.

RE: P6 Core
By Belard on 3/29/2007 3:58:57 AM , Rating: 2
For gaming and general use - back then, my P3-900Mhz was on par with a buddy's P4 1.4Ghz... He paid $800 for RAM alone (it would have been $300 for the faster AMD's memeory)

RE: P6 Core
By Conman530 on 3/30/2007 1:01:18 AM , Rating: 2
For general purpose stuff (in other words, anything but media encoding, which the P4 shined in from day 1) the P4 was slower than the PIII, but not by that much.

Wrong, dead wrong.

My 1200MHz CELERON, based on the Tualatin Pentium III Core, on a 100MHz (SLOW) Bus, with only 256K (half of PIII-S)of L2 Cache, can do more MFlops Whetstone in PC Wizard 2007, than my 2.26 P4 can on a 400MHz Bus (I think), and when overclocked to 1450 MHz, my old Celly can match the performance of my 2,66 NORTHWOOD P4 on these benchmarks. I prefer using my Celeron (with 1.5 GB of RAM) to my P4, any day of the week. I even play the occasional round of CS 1.6, or BF 1942 on the old thing. My P4s? Those can fold, I don't care.

Long live the ever-more-efficient P6. Long Live Conroe.

RE: P6 Core
By zsdersw on 3/30/2007 8:12:20 AM , Rating: 2
Without details on how each system was configured (chipset, RAM, etc.) your anecdotes are dubious.

RE: P6 Core
By Conman530 on 3/31/2007 2:23:59 AM , Rating: 2
Without details on how each system was configured (chipset, RAM, etc.) your anecdotes are dubious.


Well... Here you go, this is all I know, I Know more about the Celly because It is my secondary daily-use system for E-Mail, Internet, Music, Etc. The Netburst P4s just fold all day.


System 1:

Intel Celeron Processor 1200MHz/1450MHz- Tualatin Core - 256 KB L2 Cache - 100 MHz Bus

1536MB Generic PC 133 - Running at PC 100

MSI 694-T Pro Socket 370 Motherboard

Via Apollo 133T Pro MB Chipset

Nvidia Geforce 6200LE 256MB GDDR2 AGP 4x Graphics Card

System 2:

Pentium 4 Processor 2260MHz/2660 MHz - Northwood Core - 400 MHz Bus - 512 (I think) KB L2 Cache

512 MB (RAM doesnt matter for CPU testing :-]) Crappy RAMBUS PC1066 RAM

Some old Asus Mobo (dont have box/manual etc.)

Intel 8xx sumthing or rather MOBO Chipset...

Nvidia GeForce 5950 Ultra AGP 4x Graphics Card


The difference in other system specs should not have substantial bearing on the results of the CPU tests.

RE: P6 Core
By zsdersw on 3/31/2007 11:05:46 AM , Rating: 2
Device manager should be able to give you some information about the chipset. Although you probably have the 850e chipset.

533MHz FSB is ideal for pc1066 RDRAM.. so you should use that or get a Northwood-B P4 and see how the tables turn. I *highly* doubt the Celeron would be faster.. even with the 400MHz FSB.. as the 850e chipset and pc1066 RDRAM is a very solid performer.

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