backtop


Print 66 comment(s) - last by Trisped.. on Apr 12 at 6:28 PM


The bell tolls for "Nehalem" when Intel's clock strikes next in 2008
More details of Intel's next-generation architecture unveiled

Intel's "tick tock" development cycle continues to chime with the Nehalem processor architecture scheduled for production next year. Intel Senior Vice President Pat Gelsinger detailed the advanced features on the next-generation to DailyTech earlier today.

In the second half of this year, Intel will release its first 45nm Penryn-based processors.  While nearly identical architecturally to the Core 2 Duo processors released last year, Penryn's 45nm node allows Intel to put more L2 cache onboard; the company already announced Penryn-based processors will utilize up to 12MB of L2 cache on quad-core designs.

Intel's 45nm node utilizes metal transistor gates and high-k dielectrics.  The departure from silicon-based transistors translates to a 5-fold reduction in source-drain leakage and a 10-fold reduction in dielectric leakage.  According to Intel guidance, this means existing processors could run 20% faster just by switching to metal gate and high-k transistors.  Gelsinger claims mature Penryn processors will operate in excess of 3 GHz per core, with 1600 MHz front-side busses on server platforms.

After the 45nm shrink has matured, Intel will then incorporate architectural changes into its processor family, currently dubbed NehalemNehalem is still a 4-issue architecture similar to Core, but new advances in management and scalability give Nehalem its new micro architecture designation.

Earlier this year Intel roadmaps stated Hyper-Threading would appear on some Penryn processors.  Shortly after, Intel retracted the roadmap, stating that simultaneous multi-threading will not reappear until 2008.  This was made evident today when Intel unveiled its next-generation threading plans for Nehalem.

High-end server Nehalem-family processors have eight cores. Coupled with 2-way threading, these processors appear as 16 logical CPUs.  This threading is dynamic: Threads can be powered on and off depending on the application needs.

Dynamic threading isn't the only on-the-fly operation for Nehalem.  Almost everything about Nehalem can be dynamically managed: Power, threads, bus, cache and cores.  This management is primarily a power-saving feature, but also allows for saleable designs as well.

The bulk of these changes are possible due to Nehalem's on-board memory controller.  AMD realized the advantages of integrated memory controllers (IMCs) with the introduction of its Opteron series processors four years ago.  Intel has long toyed with with IMCs on some processors, and will even deliver the Tolapai system-on-a-chip later this year with an integrated memory controller.

Intel's dynamic bus, the Common System Interface (CSI), is clearly a focal point for the Nehalem architecture.  With many respects, CSI is very similar to HyperTransport: Variable, serial interconnects for processor-to-processor communication.  CSI will not only make its debut on Nehalem, but design engineers have also confirmed to DailyTech that CSI will have a large presence on next-generation Itanium platforms as well.

Intel leaves a single teaser in its Nehalem design guidance: "High performance integrated graphics engine for client."  Speaking on background, Intel insiders stated "The majority of the Intel Northbridge is already on the Nehalem die, so adding the final logic to include graphics is essentially [trivial] with the correct bus support."  Intel's renewed interest in graphics processing came just weeks after AMD made similiar announcements, which AMD has codenamed Fusion.

In addition, Intel will also expand the SSE4 instruction set.  Other architectural tweaks include shared multi-level cache.  AMD's upcoming Barcelona processors share L3 cache between cores; Intel's last NetBurst processors shared L3 cache, but no current Core processor utilizes such functionality.

Gelsinger emphasizes that Nehalem is on track for production in 2008.

Intel's "tick tock" strategy doesn't end at the 45nm node.  In 2009 Intel will optically shrink Nehalem process from 45nm to 32nm.  In a sense, it's the same move Intel is currently undertaking with the transition from Conroe to PenrynNehalem's 32nm shrink is dubbed Westmere.  The 32nm architecture that will succeed Westmere is dubbed Gesher.


Comments     Threshold


This article is over a month old, voting and posting comments is disabled

RE: AMD is Effed
By MrBungle123 on 3/28/2007 6:43:39 PM , Rating: 4
If AMD continues to fumble around like they have lately they will be in big trouble. Considering their track record for the past year going from a 2.8GHz Dual Core to a 3.0GHz Dual Core processor is not much of an improvement. Rebadging a server platform and calling it "QuadFX" wasn't in any way shape or form the "advancement" they hyped up up to be, it more shows me that they are desperate to keep up and needed to manufacture a new label to get some attention. You could have done the same thing by dropping modern video cards and latest round of Opteron processors into Maximum PC's Dream Machine 2005.

I really want to see barcelona come out swinging, we need competition in the CPU market. But given AMD's current pace im not sure it will be enough. They will need to have barcelona's architectural successor up and ready to go in a year or they will be in the same position they are now... one process technology and one architecure behind.


RE: AMD is Effed
By encryptkeeper on 3/30/2007 10:38:49 AM , Rating: 2
AMD has been lacking in the last couple of months as the K8 architecture has been brought to an early death by core 2, that's probably the only fact that anyone sane could agree on. We never know what will happen with Intel or AMD but it's already been said that Intel took heavy hits in the profit department in Q3 or 4 (can't remember) of last year and AMD will have to step up production when Barcelona comes out. AMD is also stuck facing a cheap, well received chip that many people have in their systems, and not as many people will jump on upgrading to Barcelona unless it's VERY cheap and MUCH better than Core 2. Intel finished Core 2 and fired 10000 employees, no doubt many of those that were fired did serious development work on the Core 2 project who are now possibly working for AMD. When it comes time to redevelop an architecture, Intel probably won't be able to make as large a leap as Core 2.


RE: AMD is Effed
By viscount02 on 3/31/2007 2:52:24 AM , Rating: 2
Dude.. STFU. you don't know your facts so shut up. Intel fired most of the non-essential people-- like 1,000 managers and people from marketing. They cut projects that were just sucking the life and limb out if intel. I KNOW there were software developers who did jack squat.

encriptkeeper, You do not know what you are talking about.

http://news.soft32.com/intel-says-goodbye-to-10000...

AMD is in trouble. Barcelona will get its L2 cache(essentially its buttocks) handed to itself when penryn shows up. MCM with onboard memory controller and northbridge on die means dark times for AMD.


"Mac OS X is like living in a farmhouse in the country with no locks, and Windows is living in a house with bars on the windows in the bad part of town." -- Charlie Miller

Related Articles
Intel Readies New "Tolapai" System-on-Chip
February 4, 2007, 10:47 PM
Recent Intel Tidings, Retractions
January 31, 2007, 9:38 AM
Life With "Penryn"
January 27, 2007, 12:01 AM













botimage
Copyright 2014 DailyTech LLC. - RSS Feed | Advertise | About Us | Ethics | FAQ | Terms, Conditions & Privacy Information | Kristopher Kubicki