AMD: Bringing "Torrenza" and "Fusion" Together
March 17, 2007 7:07 AM
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"Torrenza" systems will accept both multi-core, accelerators, or "Fusion" processors
AMD sheds more light on accelerated processing projects
This week at CeBIT 2007, AMD revealed more details about its
"accelerated computing" platform, codenamed
. AMD's goal behind
is to create a platform where application-specific processors can interact cost effectively and offer better performance than a general purpose CPU, while remaining compatible with off the shelf platforms.
AMD guidance revealed this week that future processors will also have integrated "accelerators" embedded into them. A
system will have at least two sockets, and both will accept accelerators and accelerated CPUs.
One accelerated-processor project on AMD plate,
slated for 2008 under the codename
, and combines a dedicated GPU or GPU accelerator onto the same package or even the same silicon die as the main CPU. AMD has already set the ground-work for Fusion processing with its
Stream Computing initiative
-- utilizing ATI-based graphics adaptors for heavy number crunching.
ready projects are also coming to light. Clearspeed
announced its CSX600 math-coprocessor
plug-in last year, with the stated intention of creating a socket plugin version for
. Los Alamos National Labs is currently
building the world's fastest supercomputer
, Roadrunner, with Opteron and Cell processors on the
is not just locked within the compounds of the CPU sockets. According to AMD,
systems will accept accelerators in a PCI-Express interface too, allow for multiple application specific accelerators to access system memory and processor functions directly. Mercury systems
announced a PCIe plug-in accelerator late last year
is well on its way to seeing daylight,
Intel is also working on its own open architecture
platform. Notorious for keeping its CPU platform a closely guarded technology, Intel indicated that it was working on a competitive technology to AMD's HyperTransport, dubbed CSI, allowing direct CPU and memory access.
Intel guidance suggests the company will announce its
competitor sometime in mid-2008.
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RE: Nice to see this finally being reported on. It's not 'new' news tho...
3/19/2007 3:58:13 PM
That's the thing you keep calling it "Intel adopting HT" but Intel isn't adopting a standard AMD had a hand in developing, they are working on their own solution aka CSI. It may do some of the things and in some of the same ways, but it's Intel standard and they have control on what they wish to do with it.
Companies buy products that perform, the purpose of a point to point connection such as HyperTransport or CSI, is to alleviate a potential bottleneck in processor to processor communication as well as to the main memory.
Intel made a choice, which would harm them more, giving props to AMD by developing and using HyperTransport, essentially saying they accept AMD as an actual equal OR hold out till they can develop their own solution that achieves the same goal with the con of having reduced performance on their high end server platforms?
Intel chose the latter decision and we will have to see if it hurts very much as what was pointed out 4P+ Servers aren't majority of systems sold.
What AMD did though with HyperTransport by releasing it as an open-standard is indeed a good decision for AMD and comes with it's own set of advantages. But AMD did this only because it believes in the long run this will do more good then harm to themselves.
And you have no evidence as to whom is down moderating your posts, just because someone has the ability to fire a gun, doesn't mean they are the ones that did.
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