AMD: Bringing "Torrenza" and "Fusion" Together
March 17, 2007 7:07 AM
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"Torrenza" systems will accept both multi-core, accelerators, or "Fusion" processors
AMD sheds more light on accelerated processing projects
This week at CeBIT 2007, AMD revealed more details about its
"accelerated computing" platform, codenamed
. AMD's goal behind
is to create a platform where application-specific processors can interact cost effectively and offer better performance than a general purpose CPU, while remaining compatible with off the shelf platforms.
AMD guidance revealed this week that future processors will also have integrated "accelerators" embedded into them. A
system will have at least two sockets, and both will accept accelerators and accelerated CPUs.
One accelerated-processor project on AMD plate,
slated for 2008 under the codename
, and combines a dedicated GPU or GPU accelerator onto the same package or even the same silicon die as the main CPU. AMD has already set the ground-work for Fusion processing with its
Stream Computing initiative
-- utilizing ATI-based graphics adaptors for heavy number crunching.
ready projects are also coming to light. Clearspeed
announced its CSX600 math-coprocessor
plug-in last year, with the stated intention of creating a socket plugin version for
. Los Alamos National Labs is currently
building the world's fastest supercomputer
, Roadrunner, with Opteron and Cell processors on the
is not just locked within the compounds of the CPU sockets. According to AMD,
systems will accept accelerators in a PCI-Express interface too, allow for multiple application specific accelerators to access system memory and processor functions directly. Mercury systems
announced a PCIe plug-in accelerator late last year
is well on its way to seeing daylight,
Intel is also working on its own open architecture
platform. Notorious for keeping its CPU platform a closely guarded technology, Intel indicated that it was working on a competitive technology to AMD's HyperTransport, dubbed CSI, allowing direct CPU and memory access.
Intel guidance suggests the company will announce its
competitor sometime in mid-2008.
This article is over a month old, voting and posting comments is disabled
RE: Intel not open yet
3/17/2007 9:57:02 PM
AMD do not own Hyper-Transport, its an open standard owned by a consortium
That was my point...AMD
own HT, but they released it as an open standard to the Consortium for development. The theory being (which did work well) that by giving away the IP of HT, development for the standard would happen very quickly and in a much wider number of applications.
This is also what they have done with Torrenza...Torrenza is the coherent HT (which AMD had kept the rights to) that allows for direct connection into the cache rather than the HT controller on the CPU.
RE: Intel not open yet
3/18/2007 9:00:47 AM
..The theory (which did work well) that by giving away the IP of HT, development for the standard would happen very quickly and ..This is also what they have done with Torrenza..."
Torrenza is neither open, a standard nor a success. It is not open because it is licensed and even what is licensable does not include what is truly useful - coherency. It is not a standard because is neither used widely nor intended to be used as a broad interconnect and AMD agrees with that statement. Success? Well, that's subjective but I give it a big ZERO.
If Torrenza is all you say it is, then why did the industry adopt Geneseo? Explain that one. Why did AMD join Geneseo? And IBM, and SUN?,,, all Torrenza adopters. Here is the answer = Torrenza is a proprietary interconnect licensed by AMD for AMD platforms. CSI is a licensed interconnect for Intel platforms. Geneseo is an open PCI-SIG interconnect to address 95% of both CSI and Torrenza do wich full SW compatibility with PCI software protocols - now THAT's a open spec - not Torrenza.
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