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Professor Andre Geim of The School of Physics and Astronomy at The University of Manchester

Dr. Kostya Novoselov of The School of Physics and Astronomy at The University of Manchester

Graphene-based transistor created by the University of Manchester team
The largest hurdle in semiconductor miniaturization has just been shattered

Using the world’s thinnest material, Graphene, researchers at the University of Manchester have created the world’s smallest transistor. According to Professor Andre Geim and Dr. Kostya Novoselov from The School of Physics and Astronomy at The University of Manchester, the new transistors are only one atom thick and less than 50 atoms wide. The development opens the gate to superfast computer chips at sizes not possible before with standard Silicon transistors.

According to the semiconductor industry roadmap, miniaturization of electronics will face its largest challenge in the next twenty years. This is because Silicon based technology will begin to reach its minimum size limit. 

Graphene, a form of carbon that is only one atom thick, may provide a solid alternative for even further miniaturization of electronics as silicon-based technology reaches its limit.

Graphene transistors were originally created two years ago, but at that time they were very “leaky” meaning current could not be turned off to zero. The “leaky” quality of the transistors effectively limited their uses, and rendered them useless for employment in computer chips and electronic circuits. But over the course of the past two years the research team at the University of Manchester was able to overcome this problem, and have created fully-functional and stable Graphene transistors.

Graphene transistors remain stable and conductive even when they are only a few nanometers wide. This is in contrast to all other known materials, including the dominant silicon transistors, which “oxidize, decompose and become unstable at sizes ten times larger.” This is the barrier that current silicon-based technology is approaching and is likely to also be its downfall.

"We have made ribbons only a few nanometers wide and cannot rule out the possibility of confining graphene even further - down to maybe a single ring of carbon atoms," says Professor Geim of the University of Manchester.

Graphene provides a solid alternative to Silicon and according to Geim can lead to even further reductions in size. Geim expects future electronic circuits to possibly be carved out of a single Graphenesheet.  

Dr Leonid Ponomarenko, who is leading this research at The University of Manchester, is optimistic of the technologies’ future.

"The next logical step is true nanometer-sized circuits and this is where graphene can come into play because it remains stable - unlike silicon or other materials - even at these dimensions."

Geim believes that Graphene is the only viable successor to Silicon after the currently dominant technology reaches its limit.  Graphene-based circuits, however, are not likely to be completely ready until 2025.

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RE: What I'm wondering is
By masher2 on 3/2/2007 7:12:23 PM , Rating: 2
> "That's good for at least another 30 - 45 years of moore's law."

Moore's Law doesn't apply here. Fundamentally, its merely a statement of geometry...that a linear decrease in feature size yields a quadratic increase feature density. Or, in simpler yerms-- doubling "x" quadruples "x^2".

Now while 3D chipbuilding techniques are highly exciting and can yield some impressive gains...they won't be quadratic gains. And thus Moore's Law doesn't apply.

RE: What I'm wondering is
By surt on 3/2/2007 8:32:26 PM , Rating: 2
I meant Moore's law in the more conventional sense of 'we can double the number of transistors every year'.

The term Moore's Law was coined by Carver Mead around 1970.[4] Moore's original statement can be found in his publication "Cramming more components onto integrated circuits", Electronics Magazine 19 April 1965:'s_law

RE: What I'm wondering is
By masher2 on 3/2/2007 9:18:52 PM , Rating: 3
> "I meant Moore's law in the more conventional sense of 'we can double the number of transistors every year'"

Right, but that statement is a direct result of quadratic growth. We move to new litho process nodes in linear time, which results in quadratic density increases (doubling of transistor counts in the same space, at the same cost).

3D circuit fabrication gives us a linear growth path, but not a quadratic one.

RE: What I'm wondering is
By surt on 3/3/2007 7:13:17 PM , Rating: 2
Just double the number of layers each year. 2 layers, 4 layers, 8 layers ....
2^30th layers.

RE: What I'm wondering is
By masher2 on 3/4/2007 4:36:39 PM , Rating: 1
I'm sure you can see yourself why this doesn't work :)

RE: What I'm wondering is
By surt on 3/4/2007 5:35:56 PM , Rating: 2
It doesn't work at something in the neighborhood of 2^30th layers (what will fit within a conventional computer cube), which buys us another ~45-60 years of moore's law, as I originally suggested (depending on just how fast we can paint layers, and how thick the layers have to be to provide insulation).

Then you really have to come up with something novel.

RE: What I'm wondering is
By masher2 on 3/4/2007 9:47:12 PM , Rating: 2
You're not getting it. Let's pretend its the year 20xx and we can build circuits consisting of 10 layers. Then, in a couple years, we can probably build them with 15 layers, then a couple years after that, our limit will be 20, etc, etc. That's a linear growth function.

There's no reason to expect exponential growth from a layering approach. Why would we? Each new layers adds a linear increment to our total circuit volume, but it doesn't affect the layers which came before it.

RE: What I'm wondering is
By Upset Nerd on 3/3/2007 9:18:03 AM , Rating: 2
Isn't Moore's law primarily dependant on the exponential, and not linear, decrease in one-dimensional feature size while the quadratic gains in feature density is merely an added "bonus" on top of that so to speak?

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