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Intel promises 45nm server processors this year

Earlier today, Intel revealed to DailyTech more details regarding 45nm server products, including launch windows and compatibility.

Kirk Skaugen, general manager of Intel's Server Platform Group, opened his statements with "We were originally in the Q1'08 timeframe. Today I'm happy to announce to report for the first time that our server 45nm Xeon products based on the Penryn core will be available into production for the second half of 2007."

Intel's latest desktop guidance claims 45nm desktop SKUs will also launch in late 2007, with volume shipments occurring in 2008.  As it stands right now, only the mobile 45nm SKUs are expected to launch in 2008.

Skaugen also confirmed that Penryn-based Xeon processors will utilize the same server platform as Xeon 5000, 5100 and 5300.  Nehalem, Intel's next-generation micro architecture on the 45nm node slated for 2008, will require new platform technology and is not compatible with the Penryn platform. 

45nm quad-core Harpertown and dual-core Wolfdale were originally slated to spearhead the next-generation Xeon launch in Q1 2008.  The existing Bensley platform, Intel 5000P chipset, will still provide the heavy lifting for volume dual-socket on 45nm Xeon.  A new platform, Cranberry Lake, will replace Bensley-VS for value dual-socket Intel platforms, and will support Harpertown and Wolfdale

Intel hinted earlier this year it might pull some of its launches in after the Penryn tape-out proved slightly more successful than anticipated.

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By berat556 on 2/21/2007 6:41:31 PM , Rating: 2
This means that AMD is in big trouble as they thought they would have a 1 year performance window till the next-generation micro architecture Nehalen would come out but this totally ruins their plans. Hopefully this means that AMD will not be able to charge $320 for their next gen x2-3800 like they did for their last and we will see some great performance at low prices. GO COMPETITION.

By chedrz on 2/21/2007 7:20:22 PM , Rating: 3
Why is everyone making a big deal out of lousy clock speeds and overclocking on AMD's 65nm procs? As the process matures, clock speeds will increase...however, that's all anyone seems to care about.

I guess everyone forgot one tiny little fact: 65nm is still based on K8. K8=OLD. Right now, AMD's in the same place Intel was with Net-burst-into-flames. When K8 hit the market, Intel didn't have anything that could compete because the Netburst architecture was OLD. You can't make an old architecture do something new. It's not possible, unless you rebuild it and retool it. And that's when you get a NEW architecture, like Core 2. Until Core 2 came out, Intel was ramping clock speeds and cutting prices. When K8L comes out, it will probably beat the pants off Core 2, and Intel will be ramping up clock speeds and slashing prices again to compensate, much like they did before, and much like AMD is attempting to do now. And when Intel's next architecture is done, and it beats the pants off K8L, AMD will be right back where they are now, slashing prices and ramping clock speeds.

So seriously, everyone stop complaining about AMD's 65nm. You can't make an old dog do new tricks (even if it is smaller than it used to be).

By ElJefe69 on 2/21/07, Rating: -1
By Roy2001 on 2/22/07, Rating: -1
By Dactyl on 2/21/07, Rating: -1
By chedrz on 2/21/2007 9:42:12 PM , Rating: 2
I think K8 has been great. K8 convinced me to use AMD for my first build, and I'll probably stick with AMD until they come out with something that isn't drop-in compatible with socket AM2. But, it's had its run, and it's time for something new.

By StevoLincolnite on 2/22/2007 12:49:02 AM , Rating: 2
The K8 isn't old at all, Well not compared to Intels architecture, Fred Weber led the project to revise the K7 into a 64-bit core, Which turned out to be K8.
The first implementation of the P6 core was the Pentium Pro CPU in 1995, Which was then Used in the Pentium 2, Pentium 3, Pentium M, And the Core series of processors.
The K8 on the other hand has only been in the Athlon 64, FX, Opteron, Sempron "2" line of processors. But if you count the fact that the K8 Is a modified K7 then that includes the Entire Athlon line, Such as the XP, Duron, Sempron, And all the Thunderbird variants that came before it, (Even though that weren't Thunderbird's per-say).
The K7 or Athlon Classic was released in 1999. So four years after Intels initial P6 launch.
So really its not all that old, Its either time for a completely new architecture or another series of re-tune's and optimization of the core.

And the K8, P6, And Netburst are all completely different, For instance here in South Australia Pentium 4/D Are still being sold, And of course the Athlon 64 still wipes the floor with the Netburst processors, And the Athlon 64 still provides GOOD performance, Just because the Core 2 has been released that suddenly all Athlon 64's are now obsolete and suck, Thats just not true.

And Just for clarification the Core 2 is not a NEW architecture, Its based upon the Dual Core Yonah Processors, Which in Turn is based upon the Dothan, Which is based on Banias, Which is based on the Pentium 3 Tualatin and so on and so on.

When K8L comes out, it will probably beat the pants off Core 2

I'm tired of these comments, Now there is NO current benchmarks to prove this, So why bother? Wait till you have the product under your nose then make your decision, You would be greatly heart broken if it didn't turn out to be true.
And you can make an old Dog do new tricks, Especially when it comes to Microprocessors, For Instance with the Pentium 3 coppermine, And later on the Athlons ended up moving the L2 Cache to full speed on die, AMD later with the advent of the Palomino core (Athlon XP) added 3D Now! Professional and SSE to its processors, The Pentium 4 Gained the EMT64 64bit instructions. And not to mention that Intel added a Pentium 4 bus, Branch Tree Predictor, and Pentium 4 Cache (Which was modified again) To the Pentium 3 Tualatin and renamed it as a Pentium M, And increased the Pipeline to increase clock speeds, Also Intel Added Hyper Threading to the Pentium 4, So really Since when cant you teach an old dog New tricks?

By CollegeTechGuy on 2/22/2007 1:16:53 AM , Rating: 1
Well I posted and it said their was a problem, so i'm just going to shorten it up some.

Like he said, since when can't you teach an old dog new tricks. Seeing how Intel, and AMD, base their CPUs off of the old 8086. 8088 was a 8 bit instead of 16 bit, cheaper version of the 8086. Then the 186 came out, then 286, 386, 486, Pentium, Pentium Pro, Pentium II, Pentium III, Pentium 4, Pentium 4 HT, Pentium D, Core 2 Duo...guess what all based off the same architecture as the 8086.

By mino on 2/22/2007 6:40:23 AM , Rating: 2
Well, not so much the same architecture.
All x86 CPU are based on the same ISA, NOT architecture.
Some more common architectures for x86 ISA include:
8086-80486 series
Pentium-PentiumMMX series (P5)
PentiumPro-Core2Duo series (P6)
P4 series (Netburst)

K5 series
K6 series
Athlon series (K7,K8)

By mino on 2/22/2007 6:47:34 AM , Rating: 2
Also to say K8 is bad because it is "old" is pretty short-sighted.
K8 iteration of the Athlon family is old compared the Conroe iteration of the P6 family.
However both the architectures are pretty competitive to each other.
Also X2 vs. C2D should not be compared to A64 vs. P4 scenario as up to the E6400 perfromance X2's are competitive performance, power and price wise.
P4's were competitive only performance-wise. Power was out of the window as well as wattage.

By zsdersw on 2/22/2007 7:24:55 AM , Rating: 2
Not quite. Netburst chips were price-competitive as well for at least some of their life in the spotlight.

By JeffDM on 2/24/2007 2:29:25 AM , Rating: 2
I'd argue that the K6, K7 & K8 cores share an architectural heritage with NexGen's 5x86 chip. That's not a bad thing. It would be bad to dump a design for a clean-sheet if there's nothing fundementally wrong with the existing design and that improvements can still be made. AMD made the right choice, Intel did not when they made Netburst.

I think AMD's problems are more of getting newer fabs into production than anything else.

By CollegeTechGuy on 3/6/2007 10:37:18 AM , Rating: 2
lol, you mean Intel was dumb with Netburst in the fact that all they ever did was just keeping cranking out the Mhz...hmm

By SquidianLoveGod on 2/22/2007 7:07:37 AM , Rating: 2
I thought that was pretty spot on, Why did he get voted down for it?

By TechLuster on 2/22/2007 5:11:32 AM , Rating: 1
chedrz, you need to get your facts straight.

When K8 hit the market, Intel didn't have anything that could compete because the Netburst architecture was OLD.

Actually, just a few months after K8 came out, Intel answered with their "Prescott" revision to Netburst. This architecture revision was nearly as sweeping as the K7->K8 and Core->Core 2 changes. In fact, people speculated at the time that the only reason Intel didn't call it the "Pentium 5" was that it turned out to be such a dog. So all during 2004-2006 when K8 was running circles around Netburst, Intel was using a newer architecture.

Hence newer architectures do not always bring massive speedups on the order of the Netburst->Core 2 transition. In particular, while I believe the K8L/Stars cores will bring higher IPC on a maturing (and hence cooling) 65nm process, it's highly unlikely that not only will K8L overcome Core 2's 20-25% IPC advantage but will also "beat the pants off Core 2." (Of course, for the sake of healthy competition in the x86 market, we should all hope it does!)

By mino on 2/22/2007 7:03:57 AM , Rating: 2
on IPC front for INT DC K8L parts should end up on par with Conroe
for FP code DC K8L should be 20%+ faster (even K8 is pretty close to C2D)

However on QC front K8L should have better IPC on both INT and FP.

As for real performance comparison everything depends on real clocks AMD is able to pull out at reasonable power budgets.

By Lazarus Dark on 2/22/2007 7:32:19 AM , Rating: 2
huh?... uh...wha? Damn, I need to go back to school. Was that englais?

By floering on 2/22/2007 2:17:39 PM , Rating: 2
For the noobs, here is your magic decoder ring:

IPC=Instructions Per Cycle
INT=Integer (usually referring to Integer performance)
DC=Dual Core
K8L="New" AMD architecture whose QC part is code named DeerHound, should compete with C2D for a while until Penryn
FP=Floating Point (or FP performance)
C2D=Core 2 Duo, Intel's current line
QC=Quad Core

By Viditor on 2/22/2007 7:55:43 PM , Rating: 1
K8L="New" AMD architecture whose QC part is code named DeerHound, should compete with C2D for a while until Penryn

Correction, there is no K8L, it's K10.
The code name for the quad core has been Barcelona. (DeerHound was a rumour HKEPC that didn't pan out)

The only 2 advantages from Penryn will be slightly more headroom in clockspeed and a much larger cache. The larger cache will mostly just help to make up for AMD's ODMC (On Die Mem Controller) advantage, except for the rare programs on servers (a very small percentage of apps can actually fully utilize a large cache).

By nah on 2/22/2007 7:37:54 AM , Rating: 2
You can't make an old dog do new tricks (even if it is smaller than it used to be).

Actually that's not true--Intel's original Willamette cores were horrendous--even AT estimated that the difference between Willamette and Northwood3 ( 800 FSB)was at least 33 %---read Jarred's article on CPUs ( Aug 2004).The original cores ran very hot at 180 nm--the Northwoods at 130 nm were cooler--then came Prescott

More pressure on AMD....
By kilkennycat on 2/21/2007 4:54:08 PM , Rating: 3
Not satisfied with poking AMD in the eye, Intel is now trying to gouge it out. Looks as if the IBM/AMD partnership had better hurry up with completing their 45nm process. They hsve not even come up with a metal-gate RAM on that particular process yet.

RE: More pressure on AMD....
By Trotador on 2/22/2007 8:53:43 AM , Rating: 3
I'm rather puzzled by this Intel movement. Why are they doing it?. With the previous lauch date they were already ahead AMD/IBM and well positioned. Nowadays, they are in an excellent position with its "old" 65nm process churning out chips like there were no tomorrow and making big profit of it for sure. It seems that Intel wants not only to keep the pressure on the competitors but to increase it as you say but do they really need it?. They need to improve the benefits of this year and the money invested to advance the deployment of 45nm manufacturing facilities will not help at all.

So, being paronoid as Mr Grove used to be/say... could be that Intel is more scared of Barcelona than he will never admit and is somehow trying to undermine its launch with this manoeuvre and other that we will surely view...

Just to add an alternative view of the subject.

RE: More pressure on AMD....
By TomZ on 2/22/2007 9:37:31 AM , Rating: 5
If Intel has the capability, then they should do it. The more they can do to weaken AMD, the better for them in the long term. There are no prizes in the business world for being a nice guy.

RE: More pressure on AMD....
By Khato on 2/22/2007 11:52:29 AM , Rating: 2
Intel's been enjoying the gains in the server market. There's little question that Barcelona will be most competitive in that market (even now, servers are the one area AMD can somewhat keep up.)

While the 45nm Xeons really shouldn't increase performance per clock much, they will vastly increase performance per watt. Heh, and with the easily distributed nature of many server applications, it doesn't matter if an AMD server can slightly outperform an Intel based one, if two Intel based consume the same power as one AMD.

RE: More pressure on AMD....
By Master Kenobi on 2/22/2007 9:56:53 AM , Rating: 4
The thing you need to understand here, which some AMD fans don't like, but who cares. The case in point is that Intel has always been ahead of AMD in terms of Process technologies. Their architecture wasn't always the best (See Prescott) but their manufacturing and process technologies have always been second to none... (IBM can sometimes compete with them, but generally Intel seems to beat even IBM to market with new process nodes).

Now with that said, there are two things to consider when making processor chips. Architecture, and process node.

Architecture is the chip design itself, the paths, gates,
memory, interconnects, etc...

Process node is what materials are used in creating the silicon chip, as well as the manufacturing process to create said chip.

RE: More pressure on AMD....
By Viditor on 2/22/07, Rating: 0
By photoguy99 on 2/21/2007 5:40:36 PM , Rating: 2
The tragedy for AMD is that their first 65nm chips provided seemingly zero performance increase, and zero clock speed headroom increase.

The explaination for this has been it takes time to "mature" a new process before those benefits appear.

So my question is will the first Intel 45nm chips require as much "maturing" before any performance or headroom increase is realized?

By KristopherKubicki on 2/21/2007 6:39:31 PM , Rating: 4
I can't really comment on performance gains, but Intel has made a big deal that 45nm will add more L2 cache. Benchmarks that show bump in cache sizes on the Core architecture seem to indicate higher performance for certain apps, so I would suspect that's where this is going.

By Shintai on 2/21/2007 7:24:51 PM , Rating: 2
The "mature" thing seems to be an AMD issue alone. Intel usually only gain 1 speedbin over time on a process node.

By TomZ on 2/21/2007 8:22:47 PM , Rating: 2
The point of the die shrink is not about direct performance increases, it's about putting the extra die space and thermal envelope margin to use for other purposes like more on-chip cache, more cores, or more sophisticated cores. So the die shrink makes possible these other features indirectly.

By afkrotch on 2/22/2007 9:20:38 PM , Rating: 2
umm...then there was the 65nm Preslers. Which were cooler and had higher performance. Granted not a whole lot on the performance side, as they didn't make any real changes.

The Prescott was a completely different beast from the Northwoods. More L2 cache, longer pipes, smaller process, etc.

Also the C2D is hardly new. It uses the best of P6 and Netburst.

By paydirt on 2/22/2007 8:37:33 AM , Rating: 2
Die shrink generally means:

*More room for cache (65nm to 45nm means the processor will shrink by 50% area, leaving more room for cache)
*Better thermal properties
*Lower power usage (then performance per watt increases). Did you know that 40 watts a year running continuously is $35 more on your electricity bill? This matters a lot to server farms/rooms.

By Roy2001 on 2/22/2007 1:09:35 PM , Rating: 2
The rumor is Penryn is running @3.7Ghz on air in Intel lab, and most probably within 65W TDP, thanks to new material used in Intel 45nm process.

When will we reach the limit?
By daftrok on 2/21/2007 7:23:49 PM , Rating: 2
When will we reach a point when it is just too small and we can't make the chip any smaller? I know that atoms are 0.1 to 0.5 nm in diameter but can we really make a 1 or 2 nm chip?

RE: When will we reach the limit?
By Shintai on 2/21/2007 7:27:01 PM , Rating: 2
I think the wall is about 22nm currently. I doubt anything under 10nm is possible for a commercial product. Thats why we have a huge focus on optical quantum computing as the solution.

RE: When will we reach the limit?
By TomZ on 2/21/2007 8:24:40 PM , Rating: 2
The wall keeps moving. It is typically considered to be at 2-3 process nodes from where they are manufacturing today. New research and develoment always seems to yield breakthroughs that move the wall to the next smaller node.

RE: When will we reach the limit?
By Viditor on 2/21/2007 9:49:55 PM , Rating: 2
can we really make a 1 or 2 nm chip?

In 2001, IBM made the first CNT (Carbon NanoTube) gate. They are 1nm thick, and require only a single electron for switching...
AMD and IBM have been working steadily on the process, and Intel is now doing so as well.

RE: When will we reach the limit?
By sdsdv10 on 2/22/2007 9:09:25 PM , Rating: 2
They are 1nm thick, and require only a single electron for switching...

Doesn't leave much room for error, does it? ;)

RE: When will we reach the limit?
By Viditor on 2/22/2007 10:21:20 PM , Rating: 1
Doesn't leave much room for error, does it? ;)

LOL...Good point! :)
Of course with voltage that low, think what kind of clockspeed they'll be able to hit...100GHz?

RE: When will we reach the limit?
By aca on 2/25/2007 4:59:38 PM , Rating: 2
Actually Resonant Tunneling diodes (RTD's) can run up to a few THz.

RE: When will we reach the limit?
By ChipDude on 2/24/2007 12:21:29 AM , Rating: 2
We will reach the economic wall before we reach the physical one. I think it was TJ who said the limit will be decided in the boardroom not the lab.

Today a litho tool runs 20 million, a fab 3-4 billion. For 32nm figure 40-60 million for the litho tool and 5 billion plus for the fab. Add in a billion and half for R&D plus another 200-500 million for the product development. Do the math your business needs to be about a billion even to fund a design and 10 billion to fund a fab at 32nm. There will be only a few commodity memory players, INTEL, and foundrys lagging a node behind.

The physical planar limit is around 10nm, but the economic costs will insure it may never be commercialized.

Under Promise and Over Deliver!
By Brassbullet on 2/21/2007 6:01:14 PM , Rating: 2
Gotta love Intels new development strategy. I'm actually more excited about the up comming CPUs than GPUs...that's a first since say...1996?

RE: Under Promise and Over Deliver!
By bbomb on 2/21/2007 11:55:54 PM , Rating: 2
The thing is that Intel is pumping out new chips it seems once or twice a year. How can they make money on the previous version if they push out the next one before it has a chance to mature?

RE: Under Promise and Over Deliver!
By JumpingJack on 2/22/2007 2:20:51 AM , Rating: 1
This is the affect of competition, so thank AMD for that one... they did a good job of poking the giant in the eye and beating them with a stick (to paraphrase R.Sood).

It would appear that Intel has refocused with the intent to not allow a situation like Netburst vs Hammer/K8 happen again.

RE: Under Promise and Over Deliver!
By ybee on 2/22/2007 10:56:47 AM , Rating: 1
Who knows. Intel has done quite a few bad CPU designs in the recent past, and will surely do many more bad designs in the future.

In fact the uniprocessor microarchitecture has remained more or less the same for the last ten years: three-way superscalar, out-of-order execution, around ten pipeline stages. Intel tried to make it wider (Itanium) and longer (Netburst) and failed in both cases. Intel's experiments with SMT (hyperthreading) did not fare too well either. So, based on the previous track record, there is not much hope that intel's new designs will change the world.

RE: Under Promise and Over Deliver!
By JeffDM on 2/24/2007 2:48:20 AM , Rating: 2
I thought hyperthreading worked pretty well. Even if it didn't speed up a task, it makde multitasking more comfortable. It also added practically nothing to the CPU core. One big problem is that for a while, the OS scheduler didn't really recognize that it wasn't really a second processor, and the programs typically used didn't do good enough threading to take advantage of that. Only now, with dual core, is decent threading done. Often it takes a while for the software world to really take advantage of new hardware.

Itanium works pretty well, but Intel gave up any pretense that it's a desktop chip, but it's a good heavy iron chip. I think they tried to commercialize VLIW as a general purpose type architecture before it was really ready. If Alpha EV7 was any indication, they could have had a workable six-issue superscalar design. I've seen benchmarkes that showed EV7 at 1GHz ran many things about as fast as a 2GHz Opteron did.

RE: Under Promise and Over Deliver!
By ybee on 2/24/2007 3:57:21 AM , Rating: 2
Hyperthreading was really good for a small number of applications, but actually slowed down many other applications and significantly increased power dissipation. On balance it was more of a marketing trick than a working SMT. I hope Intel will have a much better SMT implementation in Newhalem.

As for Itanium, it would be an excellent case study for MBA students. People responsible for Itanium made a few bad assumptions:
1) Static sheduling would lead to much higher ILP compared to dynamic sheduling (not really true)
2) Performance would be determined by clock rate and ILP (now the focus is on TLP)
2) IA-64 will be the only mass market 64 bit architecture (well...)

When Opteron offered a comparable perfomance and 64 bits, that was a first huge blow. When everyone finally agreed that the future was going to be multicore, ILP stopped to be as important, and the whole rationale for Itanium disappered.

So, right now in TLP-oriented applications Itanium is loosing to multi-core designs in terms of performance, performance per watt, performance per die area, and perfromance per dollar. And what is more important, it failed to reach necessary sales volume, so it has a much smaller R&D budget than x86 designs, less software and so on.

Itanium was not supposed to be a big iron chip. It was supposed to be a mass market CPU and it falied.

I dont know when Intel will finally decide to kill Itanium, but I think we all will be better off if this happens sooner rather than later. Ultimately its our money that get spent on keeping it alive.

RE: Under Promise and Over Deliver!
By defter on 2/22/2007 4:29:12 AM , Rating: 1
That's how it was in the good old days, for example:

Early 1999: P3 Katmai
Fall 1999: P3 Coppermine (0.18um)
Fall 2000: P4
Summer 2001: 0.13um P3 (Tualatin) for mobiles
January 2002: P4 Northwood (0.13um)

Early 1999: K6-3
August 1999: Athlon
Late 1999: 0.18um Athlon
Summer 2000: Athlon Thunderbird
Spring/Fall 2001: Athlon Palomino

Last couple of years before Core2 launch were veeeeery boring, because Prescott was so slow.

By SquidianLoveGod on 2/22/2007 7:11:22 AM , Rating: 2
I actually always preferred the early model celerons to the late Pentium 2's and Early Pentium 3's they always had such good over clocking potential :)

And agreed it has been boring in the CPU market before the Core series of processors were introduced, But the laptop segment was always something to watch at least.

RE: Under Promise and Over Deliver!
By paydirt on 2/22/2007 8:40:16 AM , Rating: 1
Their profit margins on their newer chips are close to 50%. That does not mean if charges $300 for a E6600 that Intel makes $150 on that, that means they make 50% on whatever they charge and their other vendors.

New Chipsets coming
By qnetjoe on 2/21/2007 5:13:13 PM , Rating: 2
Does anyone know if when there will be a xeon chipset that supports dual x16 sli?

RE: New Chipsets coming
By justjc on 2/21/2007 5:25:55 PM , Rating: 3
It's unlikely as Xeon is a server chip, not meant for a gaming machine. Only chance is nVidia making a special version, which is unlikely as so few will use Penryn untill it hits the private market.

This launch at least shows that Intel finally have due respect for AMD, as it's likely a response to AMDs goal to gain 30% of the quad server market, in 2008, with Barcelona. Looks like the competition will be good for the next couple of years :)

RE: New Chipsets coming
By CryptoQuick on 2/21/2007 7:34:10 PM , Rating: 3
Server chips are often used in workstation machines, such as the Mac Pro, especially in the case of Intel, where you can only get a dual processor machine with Xeons. Of course, with a workstation-class machine, you'll want greater graphics processing power, especially with GPGPU beginning to enter the picture.

RE: New Chipsets coming
By gsellis on 2/22/2007 9:34:09 AM , Rating: 2
16x SLI? Don't know. I looked the other day and there are a couple of boards that do dual 8x Crossfire that I remembered.

RE: New Chipsets coming
By cheburashka on 2/22/2007 3:02:25 PM , Rating: 1
Well considering nvidia doesn't allow SLI on Intel the answer is clearly no. I assure you the server chipsets have plenty of PCIe lanes to do this easily and then some.
On the desktop side, the x38 has dual x16 ports, so it's up to nvidia still.

By suryad on 2/22/2007 11:53:16 AM , Rating: 2
I have two.

1. What is a PSB? Does not seem like it is the same as FSB or is it?

2. Seems like there are going to be no architecture revisions, just a shrink, more cache and a bump in clock speed as well as PSB speed correct? So as an educated guess, the K10 should be able to perform better yes?

What happened to Tigerton?
By tedberg on 2/23/2007 1:00:46 PM , Rating: 2
What happened to the Tigerton Xeon cpu that was slated for second half 2007 all along? I've been targeting server upgrades for when this was available instead of Cloverton.

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