AMD's 45nm Opterons Scheduled for 2008
February 5, 2007 11:50 AM
comment(s) - last by
AMD's internal guidance suggests the company isn't very far from 45nm at all
Late last year, AMD executives alluded to a 45nm successor to the
Senior Vice President, Marty Seyer,
"bring further performance enhancements, as well as cache efficiency."
is apparently more than just a cache-bump. AMD's documentation explicitly claims
will be the company's first 45nm processor. However, with a die shrink additional cache is one of the immediate architecture options as the smaller node allows for more transistors to fit on the chip die.
features 6MB of L3 cache.
, the 65nm quad-core next-generation Opteron from AMD, is expected to launch this summer with 2MB of L3 cache. L3 cache on the K10 architecture is shared over all four cores, yet each core has an independent L2 cache as well. More details on how this new cache operation works was
detailed in June 2006 on
All other features found on
will also make an appearance on
: AMD-Virtualization (previously codenamed
), RDDR2, and HyperTransport 3.0. Like
will also tentatively ship with dual and quad-core variants. In 2008 AMD will tennatively add Secure Initialization to all its AMD-V platforms, including
will also use the Socket 1207 interface, suggesting existing motherboards will have the opportunity to upgrade to Shanghai processors -- AMD processors are typically designed to work with existing motherboards on same-socket interfaces with simple BIOS updates.
AMD and IBM recently announced
intentions to pursue the 45nm node
with high-k metal gate technology. Intel disclosed
similar process technology information
one day prior to the IBM-AMD announcement. Late last year IBM detailed its plans for
utilizing immersion lithography for its 45nm test shuttles
-- Intel uses the same process as well.
In a recent interview with
, AMD senior vice president of technology development
Douglas Grose claimed
"We'll be producing early products probably in Q2 of 2008, with full production in the second half." However, Grose also claims the company is still anticipating whether or not it will use high-k metal gate technology in later 45nm revisions or if the company will wait until 32nm.
IBM will certainly play an integral role in any 45nm plans for AMD, though production on the 45nm node ramp is not something AMD has discussed at length. AMD's first 65nm processors
just hit store shelves a few weeks ago
Intel's 45nm processor, codenamed
, has already been taped-out. Intel guidance suggests the processor will be
available to the channel in Q1 2008
was previously labeled the K8L architecture by
AMD President Henri Richard in March 2006
. Late last year, AMD executives began using the name K10 instead, while internally the platform is labeled
. On paper,
appears to be architecturally identical to
, but utilizes the smaller node.
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RE: The vital announcement missing from this news article...
2/6/2007 12:09:43 AM
The problem is not yields, but rather a growing variance of your transistor parameters. As process features get smaller, they are harder to control and it is a big problem.
When you design a curcuit you try to make all signal paths roughly the same length, so that the propagation delay is roughly the same for all inputs. But if each of your real transistors end up being randomly slower or faster than what you designed, such optimisations will not work very well. So some parts of your chips will be too leaky and hot, others will be too slow. Apparently Prescott had exactly this kind of problems - high leakage and limited clock frequency.
High k ON AVERAGE improves speed and significantly reduces transistor leakage, but since the process variation at 45 nm is likely to be much worse than at 90 nm you still end up with a lot of transistors that are too leaky or too slow.
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