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AMD's internal guidance suggests the company isn't very far from 45nm at all

Late last year, AMD executives alluded to a 45nm successor to the Barcelona core, dubbed Shanghai.  AMD's Senior Vice President, Marty Seyer, claimed Shanghai would specifically "bring further performance enhancements, as well as cache efficiency." 

Shanghai is apparently more than just a cache-bump.  AMD's documentation explicitly claims Shanghai will be the company's first 45nm processor.  However, with a die shrink additional cache is one of the immediate architecture options as the smaller node allows for more transistors to fit on the chip die.  Shanghai features 6MB of L3 cache.

Barcelona, the 65nm quad-core next-generation Opteron from AMD, is expected to launch this summer with 2MB of L3 cache.  L3 cache on the K10 architecture is shared over all four cores, yet each core has an independent L2 cache as well. More details on how this new cache operation works was detailed in June 2006 on DailyTech.

All other features found on Barcelona will also make an appearance on Shanghai: AMD-Virtualization (previously codenamed Presido), RDDR2, and HyperTransport 3.0.  Like Barcelona, Shanghai will also tentatively ship with dual and quad-core variants.  In 2008 AMD will tennatively add Secure Initialization to all its AMD-V platforms, including Shanghai.

Shanghai will also use the Socket 1207 interface, suggesting existing motherboards will have the opportunity to upgrade to Shanghai processors -- AMD processors are typically designed to work with existing motherboards on same-socket interfaces with simple BIOS updates.

AMD and IBM recently announced intentions to pursue the 45nm node with high-k metal gate technology.  Intel disclosed similar process technology information one day prior to the IBM-AMD announcement.  Late last year IBM detailed its plans for utilizing immersion lithography for its 45nm test shuttles -- Intel uses the same process as well.

In a recent interview with Reuters, AMD senior vice president of technology development Douglas Grose claimed "We'll be producing early products probably in Q2 of 2008, with full production in the second half."  However, Grose also claims the company is still anticipating whether or not it will use high-k metal gate technology in later 45nm revisions or if the company will wait until 32nm.

IBM will certainly play an integral role in any 45nm plans for AMD, though production on the 45nm node ramp is not something AMD has discussed at length.  AMD's first 65nm processors just hit store shelves a few weeks ago.

Intel's 45nm processor, codenamed Penryn, has already been taped-out.  Intel guidance suggests the processor will be available to the channel in Q1 2008.

AMD's Barcelona was previously labeled the K8L architecture by AMD President Henri Richard in March 2006. Late last year, AMD executives began using the name K10 instead, while internally the platform is labeled Greyhound.  On paper, Shanghai appears to be architecturally identical to Barcelona, but utilizes the smaller node.


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Competition is good, but...........
By Roy2001 on 2/5/07, Rating: 0
RE: Competition is good, but...........
By davegraham on 2/5/07, Rating: 0
RE: Competition is good, but...........
By Shadowself on 2/5/2007 1:34:52 PM , Rating: 4
My understanding is that Penryn actually has silicon out there running a minimum of 3 operating systems and multiple applications on some of them. So far AMD/IBM have just described what "they are going to do". To me that is a paper launch by IBM/AMD whereas Intel's "launch" is a bit more real.

Also the article above states, "Late last year IBM detailed its plans for utilizing immersion lithography for its 45nm test shuttles -- Intel uses the same process as well." My understanding is that Intel won't use immersion lithography for the production runs of Penryn. However, Intel has stated that it expects to use immersion lithography for the next shrink (32nm IIRC).


RE: Competition is good, but...........
By davegraham on 2/5/2007 1:38:59 PM , Rating: 2
remember the reporting machine when you quote stuff. *grin* I personally believe that Penryn will be an invaluable competitor to AMD's Barcelona/Shanghai runs, but again, I also have enough marketing "spin" running from Intel's side to conclude that there might be some slag running through there. Kudos to Intel for getting out of the gate first, but, I await the DVT spins to really judge for myself.

dave


RE: Competition is good, but...........
By Ard on 2/5/2007 3:16:31 PM , Rating: 3
I wonder if you are who I think you are...

In any event, I recall hearing similar FUD when Intel dropped their Conroe benchmarks early last year. Everyone thought they were lying or they had intentionally crippled the AMD machine. Conroe launched and, lo and behold, Intel was telling the truth. Funny how you seem to be insinuating something rather similar.

The fact of the matter is, this is essentially nothing more than a paper launch as was stated, or, to be more precise, an announcement of future manufacturing technology. We have no idea if AMD even has running 45nm SRAMs (not likely since they would've at least mentioned them). And meanwhile Intel has already taped out working A0 Penryn silicon using the technology breakthroughs they announced earlier this year. Or are you suggesting that Intel is "lying" about that like they did the Conroe benches?


By davegraham on 2/5/2007 3:58:54 PM , Rating: 4
quote:
I wonder if you are who I think you are...


well, considering i don't know you from a hole in the ground, probably not. :)

quote:
In any event, I recall hearing similar FUD when Intel dropped their Conroe benchmarks early last year. Everyone thought they were lying or they had intentionally crippled the AMD machine. Conroe launched and, lo and behold, Intel was telling the truth. Funny how you seem to be insinuating something rather similar.


1.) I'm not spreading FUD. I'm stating that you need to be careful with sources that provide information to the channel. Example: RAM (reseller's advocate magazine) touts themselves as a manufacturer agnostic channel newsletter when, in fact, it is an Intel marketing tool. *shrug*
2.) I'm VERY cautious when manufacturer's provide "spec" machines because no one controls the process. Both AMD and Intel have historically run "cherry picked" benchmarks that tend to show their respective platforms in better lights. And, when you have investors and customers from whom you derive success and revenue waiting with baited breath, it behooves you to give them "results."

What I want to know is, what DIDN'T penryn do? What are the errata still present? etc. etc. Behind every success story is a history of failures. Running an OS, while a big step, still means work needs to be done. Again, historically, errata in SHIPPING products has caused a lot of turmoil.

cheers,

Dave


By ScythedBlade on 2/5/2007 4:25:11 PM , Rating: 1
Tis true ... but you see ... IBM and AMD's 45 nm is coming 2008 ... you usually dont have the processor AND the process done in a year ...


By udontnome on 2/5/2007 7:51:22 PM , Rating: 3
AMD showed 45nm SRAM 3 months after Intel
http://www.anandtech.com/cpuchipsets/showdoc.aspx?...


RE: Competition is good, but...........
By Justin Case on 2/5/07, Rating: -1
RE: Competition is good, but...........
By Ard on 2/5/07, Rating: 0
By Justin Case on 2/6/2007 6:46:00 PM , Rating: 2
Intel's Conroe benchmark announcement compared a 6-month-old AMD system with an Intel system that was 4 months away from being released. If you compared it (at the release date, 4 months later) with a then 10-month-old AMD system, maybe their carefully picked benchmarks did show that advantage. If you compared it with a then current AMD system, using a broader range of real-world benchmarks, no.

AMD is preparing to do the same with Barcelona, BTW.

If you trust any benchmark results presented by the manufacturers you're either very naïf or in an advanced state of fanboyism.


RE: Competition is good, but...........
By Dactyl on 2/5/2007 1:29:46 PM , Rating: 5
What is a Paper Lunch? Now I'm hungry.


By BladeVenom on 2/5/2007 2:56:32 PM , Rating: 2
He must have meant cardboard lunch. So he's talking about McDonald's.


RE: Competition is good, but...........
By decapitator666 on 2/5/2007 4:18:27 PM , Rating: 3
Like eating edible underware


RE: Competition is good, but...........
By Spartan Niner on 2/5/2007 7:52:45 PM , Rating: 2
I'm pretty sure Roy2001's 'underwear' wasn't edible judging from the negative reaction of the people who 'ate' it ;)

It seems that we're finally going to see products approaching the physical limitations of silicon/transistor technology - silly electrons need to move faster.


By nurbsenvi on 2/6/2007 8:37:03 AM , Rating: 2
Give him a break guys~


By weskurtz0081 on 2/6/2007 10:09:54 AM , Rating: 3
How the hell can somthing that hasn't been launched be a paper launch? Could someone please explain this with all the infinite wisdom gracing this thread......


By KristopherKubicki (blog) on 2/5/2007 2:29:50 PM , Rating: 2
As the author of this article, I fully agree with you. Intel demonstrated its test shuttles for 45nm a year before it taped out Penryn.

Grose is new to his position, but for AMD to expect 45nm in H2 2008, they need to have SRAM samples *now* and tape-outs within the next 6-8 months.


By davegraham on 2/5/2007 4:01:10 PM , Rating: 2
kris,

but of course, given that AMD plays things a little closer to their chest on the server side, MIGHT they be playing a little "game" with the channel gossip?

what WOULD a counter-release look like from AMD?

dave


By KristopherKubicki (blog) on 2/5/2007 4:34:00 PM , Rating: 2
By davegraham on 2/5/2007 4:41:37 PM , Rating: 2
lol....was going to use http://www.theregister.co.uk/2007/01/28/intel_ibm_... instead, but ok... :)

dave


By Viditor on 2/6/2007 6:12:53 AM , Rating: 2
quote:
AMD to expect 45nm in H2 2008, they need to have SRAM samples *now* and tape-outs within the next 6-8 months


AMD 45nm SRAM samples were shown in early April 2006...
http://www.anandtech.com/cpuchipsets/showdoc.aspx?...

AMD also gave us a brief update on 45nm, stating that they have successfully produced a SRAM test wafer at 45nm


By davegraham on 2/5/2007 2:31:12 PM , Rating: 2
quote:
By the way, has AMD yet demonstrated their quad-core on the 65nm process (Barcelona?) with multiple OSs up and running? That would be far more significant news than the rustle and flutter of paper-projections in this news article. Intel has now demonstrated Penryn up and running a year before formal production. Surely AMD has their K8L dual and quad-cores now fully up and running and ready to demonstrate to the world six months before their expected volume-shipping date ?


they have shown them running and yes, they're perfectly capable of running "multiple OS's" and hardware.

*sigh*

i can appreciate (again) that Intel is "first" in several key points in CPU design and implementation but to brush with the broad strokes that you are, you're definitely missing several underreported items out there.

dave


By kilkennycat on 2/5/2007 10:17:19 PM , Rating: 2
... exactly where and when did they show the news media or public their 65nm K8L dual and quad-core processors actually running, specifically the quad-core ? I keep pretty close track of the digital-silicon industry and I must have been asleep. Useful URLs to the records of these demos, please.


By ybee on 2/5/2007 3:14:57 PM , Rating: 2
It seems that moving to 45nm will not lead to a really big improvement in transistor performance (even with HK/MG) and transistor density. And if you consider that process variation may get much worse at 45 nm, actual benefits of moving to 45nm may be relatively small for both Intel and AMD.


By JeffDM on 2/5/2007 5:04:56 PM , Rating: 2
It's possible, but I don't think it will be so bad.

I think the 45nm process involved a new, higher-k dielectric, meaning better electrical efficency because the process makes chips that will "leak" less current.

I think Intel said that their 65nm process reached acceptable manufacturing yields far quicker than any other manufacturing process reduction they've done, they showed a chart showing how quickly yields increased for every process, and the trend was getting better, not worse. The 45nm process may very well follow that trend.


By ybee on 2/6/2007 12:09:43 AM , Rating: 2
The problem is not yields, but rather a growing variance of your transistor parameters. As process features get smaller, they are harder to control and it is a big problem.

When you design a curcuit you try to make all signal paths roughly the same length, so that the propagation delay is roughly the same for all inputs. But if each of your real transistors end up being randomly slower or faster than what you designed, such optimisations will not work very well. So some parts of your chips will be too leaky and hot, others will be too slow. Apparently Prescott had exactly this kind of problems - high leakage and limited clock frequency.

High k ON AVERAGE improves speed and significantly reduces transistor leakage, but since the process variation at 45 nm is likely to be much worse than at 90 nm you still end up with a lot of transistors that are too leaky or too slow.






By Viditor on 2/8/2007 4:00:58 AM , Rating: 2
quote:
There is no mention by AMD or IBM of a working DRAM or SRAM block on their 45nm process

There is, and it was in April last year...
quote:
Intel had a large block of test-RAM fully working on their 45nm process Spring last year

No, it was January last year.
quote:
By the way, has AMD yet demonstrated their quad-core on the 65nm process (Barcelona?) with multiple OSs up and running?

If you are comparing to Penryn, the OSes were booting, not really running.
But if your question is if Barcelona is up and running, then it should be apparent that it must be...
In order to release bin speeds and skus, it's necessary to actually manufacture and test several wafers of the product. Bin speeds are based on actual wafers, not estimates...


Facts and BS from IBM
By Lexington on 2/5/2007 11:25:58 PM , Rating: 2
Lets review some the facts here
1) INTEL announced HighK metal gate in 2003
2) They annouced fully functional, 100% yielding 158MegBit arrays in 2006
3) In 2007 they annouced that 45nm would be HighK metal gate and that they had functional CPUs.

IBM has a long history of leadership and publication of their precieved leadership. Look back at all their press about Cu, LowK silk, SOI, etc. etc. Its very odd that this past December they annouced jointly with AMD their 45nm technology without a single mention or hint that HighK was on the roadmap. You would really think that the biggest breakthru in silicon technology would be annouced at the biggest silicon technology conference. Was it, No. Then when they got wind of INTEL's big annouced they did a hasty me to me to.

Look at this statement" We'll be producing early products probably in Q2 of 2008, with full production in the second half." However, Grose also claims the company is still anticipating whether or not it will use high-k metal gate technology in later 45nm revisions or if the company will wait until 32nm. What the hell does "anticipate" mean. Da Grose sure seems to have some interesting work selection that pretty much can be spinned any way you want.

For a seperate look at the circus from IBM go here:
http://www.theregister.co.uk/2007/01/28/intel_ibm_...




RE: Facts and BS from IBM
By ybee on 2/6/2007 12:32:46 AM , Rating: 2
I think if you use SOI you dont really need high k all that much. As far as I remember, high k reduces sub-threshold leakage by increasing oxide capacitance, while SOI does the same by reducing depletion capacitance. So while for Intel high k is critical, for AMD and IBM it may not be as important.

Since high k has its drawbacks - in particular interface trapped charges reduce carrier mobility, IBM and AMD may be actually better off delaying high k introduction till 32nm- even if they have the technology ready for 45nm.



RE: Facts and BS from IBM
By ChipDude on 2/6/2007 11:24:37 AM , Rating: 2
CHeck the latest data on what the gate leakage looks like for atomic layer thick SiON. Gate leakage has become a huge componenet of standby power. SOI does nothing for that.


RE: Facts and BS from IBM
By ybee on 2/6/2007 12:11:48 PM , Rating: 2
Thats right. But the main reason why we want a thin oxide layer is the subthreshold swing, isnt it? With SOI you can probably have a thicker oxide and still get a reasonable swing.

But of course I'm just speculating. I have no idea what are the actual tradeoffs for SOI and high-k for a 45 nm process.


What's RDDR2?
By Assimilator87 on 2/5/2007 1:15:38 PM , Rating: 2
quote:
All other features found on Barcelona will also make an appearance on Shanghai: AMD-Virtualization (previously codenamed Presido), RDDR2 , and HyperTransport 3.0.




RE: What's RDDR2?
By davegraham on 2/5/2007 1:17:20 PM , Rating: 3
it's "Registered DDR2" versus "UDDR2" which is "Unbuffered" DDR2

cheers,

dave


By Kiijibari on 2/6/2007 4:49:48 PM , Rating: 2
It has 4 x 16bit Hypertransport connectors. Current Opterons just have 3. No reports yet, if the 65nm Barcelona models are also equipped with 4 HT connectors.

http://www.pcpop.com/doc/0/167/167267_1.shtml

cheers

Kiijibari





By KristopherKubicki (blog) on 2/6/2007 5:57:56 PM , Rating: 2
It's my understanding that Barcelona has this as well. Awesome news though :)

Kristopher


L3 cache differences
By davegraham on 2/5/2007 12:54:37 PM , Rating: 2
There are also cache distinctions between Barcelona and Shanghai.
Barcelona is a 2mb L3 cache design whereas Shanghai will utilize 6mb of L3 cache.

cheers,

dave




GHZ war is back on.
By Mitch101 on 2/5/2007 1:26:28 PM , Rating: 2
I remember Intel making a statement that current leakage wasnt a problem like it was on 90nm and 65nm and that the GHZ war would be back on when they make it to 45nm. Seems pretty evident with the overclocks of the 65nm conroes that 45nm might not only provide speed boosts in the way of architechtural design but also in the current leakage issues potentially not being an issue. However I guess time will tell and new architecture brings in new problems of its own. Also recall Intel got first gen silicon or 45nm working fine. Either way the War is on between Intel and AMD lets hope they have similar performance so we can have a nice price war between the two whomever comes out on top.




RE: GHZ war is back on.
By Jkm3141 on 2/5/07, Rating: 0
March 2007?
By sdsdv10 on 2/5/2007 2:03:16 PM , Rating: 2
quote:
AMD President Henri Richard in March 2007 .


I believe you mean March 2006, right?
Unless you have some type of cyrstal ball we don't know about. ;-)




New news from AMD!
By Regs on 2/5/2007 9:55:38 PM , Rating: 2
Always is welcome around here. Now lets see AMD execute.




.
By bbomb on 2/5/07, Rating: 0
RE: .
By bbomb on 2/5/2007 4:32:26 PM , Rating: 1
Fucking cheap ass space bar.


BTW, as I've said it ain't K8L...
By Viditor on 2/7/2007 7:56:19 PM , Rating: 1
Kris, this is in response to your comment:

"AMD's Barcelona was previously labeled the K8L architecture by AMD President Henri Richard in March 2006"

http://www.theinquirer.net/default.aspx?article=37...
"WE'VE BEEN HEARING the "K8L" codename for ages now, but we can say now, straight from the horse's mouth, K8L was never a codename for AMD's upcoming generation of chips "

"While Intel and the rest of the industry was using the codename K8L for AMD's next-gen architecture revamp, K8L existed only in AMD's expired internal roadmaps - roadmaps that died a long, long time ago"




I love the foolish fanboyism
By Beenthere on 2/5/07, Rating: -1
RE: I love the foolish fanboyism
By Zandros on 2/5/2007 6:51:21 PM , Rating: 1
Fact is that AMD suck at marketing, and they always have. Best they have done is juvenile challenges, when everyone who cared already knew they were the better.

Intel's marketing division have done a far better job than AMD's, which was very evident during the NetBurst era.

I'm not quite sure that AMD have delivered all they said. I seem to remember they claiming 40% better performance from something, might have been SoI. Didn't see that, at least not immediately, and they seem to err a bit on the far side with the process shrinks, too.


By davegraham on 2/5/2007 7:20:06 PM , Rating: 3
however, you have to be fair in your assessment.
a.) quoting Tmax and sticking within that thermal envelope. Remember Prescott?
b.) implications of HyperTransport and onboard memory controller. I've seen multiple performance reviews point to the continued effectiveness of that I/O connector (HT) and the onboard MC.
c.) greater abilities in n-way than competing intel products up to the most recent generation. still holds i/o abilities beyond the competition even with L3 cache disadvantages.

those 3 points were KEY marketing issues with AMD IN THE SERVER MARKET that they've met or EXCEEDED. hmmmm, marketing is a bitch, but some companies can actually follow through.

dave


RE: I love the foolish fanboyism
By enumae on 2/5/2007 7:28:44 PM , Rating: 2
quote:
The fact that IBM/AMD announced high-K success two years ago is forgotten but Intel's fanfare of 45 nano high-K last week is "big news".


Could you link to this?

Also, Dave Grahm had said...
quote:
they have shown them running and yes, they're perfectly capable of running "multiple OS's" and hardware.


Could you please link to this as well?

Thanks.


RE: I love the foolish fanboyism
By davegraham on 2/5/2007 7:30:43 PM , Rating: 2
i don't have links to them. I saw them running at AMD - Boxborough. :)

dave


RE: I love the foolish fanboyism
By enumae on 2/5/2007 9:35:11 PM , Rating: 2
Thanks.


RE: I love the foolish fanboyism
By kilkennycat on 2/5/2007 11:39:01 PM , Rating: 2
... running what ? A wattmeter ? A public or news-media event ? It would seem to me that AMD needs to seize every opportunity to show that the 65nm K8L designs are fully functional and headed for production to head off the gallop by the purchasing public to the Conroe derivatives. Now that Vista is here, many will be considering new computers or significant upgrades. For the PC-enthusiast community (and implicitly for AMD), no public sight yet of AMD's answer to Conroe is bad news.


RE: I love the foolish fanboyism
By Viditor on 2/6/2007 10:05:12 AM , Rating: 2
quote:
It would seem to me that AMD needs to seize every opportunity to show that the 65nm K8L designs are fully functional and headed for production to head off the gallop by the purchasing public to the Conroe derivatives


Which is why you don't semiconductor companies...
One year ago, Intel had an even greater need to "seize every opportunity to show" that Conroe was real...they didn't do that until March.
Why do you think that AMD's need is greater than Intel's was when AMD is still taking marketshare away from Intel?


RE: I love the foolish fanboyism
By enumae on 2/6/2007 11:50:11 AM , Rating: 2
quote:
Why do you think that AMD's need is greater than Intel's was when AMD is still taking marketshare away from Intel?


1. Intel was still making money and not having to pay for an aquisition.

2. To try and halt the market share gains Intel is making in the high ASP Server segment which has a dirrect effect on AMD's margins.


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