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The first official die shot of "Penryn"

Intel's high-k, metal gate transistors replace the silicon-based elements of the transistor with hafnium and metal composites
Intel confirms new details on "Penryn" family: SSE4, high-k dielectrics, metal gate transistors

A little more than six months ago we wrote an editorial about Intel's future technology after Core 2 Duo, titled "Life After Conroe."  Life after Conroe inches closer, but, in the meantime, more details on the architecture are available today.

DailyTech had the opportunity to chat with Mark Bohr, Intel Senior Fellow, and Steve Smith, Intel Vice President DEG Group Operations, about the upcoming CPU design.

The primary focus of Intel's next-generation process technology is PenrynPenryn is the specific codename a 45nm mobile shrink of the Conroe core, but the codename may also be used to describe the entire product family.  Early last year Intel announced it would optically shrink to the next process node every two years.  Staggered one year later, the company would also announce a new microarchitecture.  This philosophy of shrink followed by architecture revision will undergo its first real milestone with the node shrink from 65nm to 45nm Penryn.  One year after the 45nm Penryn shrink, Intel is also expected to announce its next-generation microarchitecture successor, Nehalem

Intel claims the upcoming Penryn will fit 410 million transistors for the dual-core model, and 820 million transistors for the quad-core variants -- dual-core Conroe utilizes just 298 million transistors.  Intel's 45nm SRAM shuttle chip, announced last year, had a little over 1 billion transistors and fit on a 119mm^2 package.  However, the initial Penryn quad-core processors will use a multi-die packaging, so it's realistic to expect only 410 million transistors per die at launch.

The optical shrink allows the engineers to boost clock speed, but the additional real estate means the company can put more logic on the processor as well. "Most of that transistor savings is spent on increasing the cache over Core 2" added Smith.

Conroe added additional SSE instructions at launch, but Intel claimed at Fall IDF 2006 that SSE4 was specifically reserved for Nehalem.  Intel's guidance for Penryn claims the family will feature "New Intel SSE4 instructions expand capabilities and performance for media/HPC applications."

When asked about the effects of SSE4 on Penryn, Smith responded to DailyTech claiming "We're seeing excellent double digit performance [percentage] gains on multimedia applications."

Penryn is still not without its mysteries; a primary concern for enthusiasts is motherboard and socket support.  Penryn will launch on Socket 775 -- meaning existing motherboards can physically harbor the new CPU,  but electrically might not. "Motherboard developers will have to make some minor changes to support [Penryn]. We can't guarantee that a person could just plug the chip into every motherboard on the market today."  However, Smith also claimed the Penryn boot test that grabbed so many headlines last week occurred on unmodified hardware that included a notebook, several desktop motherboards and several server motherboards.

The lithography process for Penryn, dubbed P1266, is not just a shrink from 65nm to 45nm.  Perhaps the most significant advance on P1266 is the use of high-k dielectrics and metal gate transistors.  In a nutshell, the polysilicon gate used on transistors today is replaced with a metal layer and the silicon dioxide dielectric that sits between the substrate and the transistor is replaced by a high-k dielectric. 

Intel's push for high-k dielectrics and metal gate transistors may be more significant than the node shrink.  Intel's guidance documentation claims with the new high-k dielectric, metal gate transistors offer a 20% increase in current, which can translate to a 20% increase in performance.  When the new transistor technologies run at the same current and frequencies as Core 2 Duo processors today, translates to a 5-fold reduction in source-drain leakage and a 10-fold reduction in dielectric leakage.

"The implementation of high-k and metal gate materials marks the biggest change in transistor technology since the introduction of polysilicongate MOS transistors in the late 1960s" claims Gordon Moore, Intel co-founder attributed with coining "Moore's Law."

Intel would not reveal the materials used in its metal gate technology, though Smith announced that the dielectric is hafnium based.  Hafnium dioxide has been the leading candidate to replace silicon oxide inside academia for years.  A different material is used for PMOS and NMOS gates.

Intel's lithography roadmap no longer ends at P1268, the 32nm node.  Earlier today Intel revealed its 22nm node, dubbed 1270, slated for first production in 2011. 

Smith closed our conversation with "In 2008, we'll have Nehalem."


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HT re enabled
By crystal clear on 1/27/2007 4:53:24 AM , Rating: 2
"Penryn is still not without its mysteries;"

Penryn cores will have HT re-enabled. -can Kristopher check
if this true.




RE: HT re enabled
By Goty on 1/27/2007 11:49:55 AM , Rating: 1
HT was never much of a performance boost for any of Intel's processors anyways. I think the other architectural changes/upgrades will far outshine HT.


RE: HT re enabled
By InsaneScientist on 1/27/2007 2:39:01 PM , Rating: 2
HyperThreading was primarily possible on the Pentium 4s due to the ulta long pipeline.

Also, HT didn't show performance gains across the board... in some scenarios (I.E. Gaming) it would actually provide a performace loss. It gave us the ability to process two threads simultaneously, with, occasionally (though rarely), up to 20% performance gains.
A true dual core processor, however, can handle the same two threads with roughly 80% performance gains (and that figure is fairly consistent), and never show any performance loss with single threads (compared to just one core being active).
Since the Core2 architecture is natively dual core (yes I know there are single core chips out there that are part of the Core 2 lineup, but they're, by far, in the minority) it can handle those two threads very well as things stand; however, most applications can barely handle two cores at this point, let alone more than 2 cores (or virtual processors, in the case of HT).

Add to that the fact that the operating system has difficulty differentiating between different cores and different logical processors, so it might assign the heaviest load to the same core's two processing engines, while the other core sits mostly idle, and you start seeing most of the drawbacks of HT without any of its benefits, except under certain (rare, for the normal user) scenarios.
(We saw most of these issues crop up with the Pentium 965, which was dual core and HT enabled, if you want to go check)


Between all that, and the difficulty (if not impossiblilty, I don't know) of implementing HT on Core2's micro architecture, I would be extremely suprised if we ever see HT again.

HT was a stepping stone to multi-core processing... not something to be used once we got there.


RE: HT re enabled
By cochy on 1/27/2007 3:08:56 PM , Rating: 1
quote:
Core2 architecture is natively dual core


AMD fanboys are going to hate you for using that word in a sentence describing Intel.


RE: HT re enabled
By Zandros on 1/27/2007 9:50:25 PM , Rating: 2
quote:
HyperThreading was primarily possible on the Pentium 4s due to the ulta long pipeline.


While explicitly HyperThreading might be suitable for the Pentium 4 only, other more shallow chips such as the Itanium 2 can and do employ mulithreading.

I think it not impossible to see some kind of multithreading on later revisions of the Core microarchitecture.

Anyway, will we see a full SSE4 implementation on the Penryn or not? The article is ambiguous to me.


"If you look at the last five years, if you look at what major innovations have occurred in computing technology, every single one of them came from AMD. Not a single innovation came from Intel." -- AMD CEO Hector Ruiz in 2007

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