backtop


Print 76 comment(s) - last by poohbear.. on Dec 5 at 3:14 AM

Quad-core, HyperTransport 3.0 and more

AMD is expected to release its 65nm products soon. Moving beyond the 65nm Brisbane die shrink and Windsor FX, AMD has a couple of other tricks up its sleeves. AMD plans to transition from its Cities core products to new Stars cores. This transition uses AMD’s new core naming scheme. While AMD has typically named its processor cores after cities, the new naming scheme uses star names.

The Stars family includes the upcoming Agena FX, Agena, Kuma, Rana and Spica cores. AMD will be introducing plenty of architectural changes with the upcoming Stars family. Stars family processors will switch over to AMD’s previously announced HyperTransport 3.0 architecture. Previously, Star processors have been referred to as Revision H or K8L -- if that's not confusing enough, AMD calls the architecture of the Stars family Greyhound. While Stars family processors use the HyperTransport 3.0 protocol, it will be backwards compatible with HyperTransport 1.0 systems.

HyperTransport 3.0 is expected to provide twice the amount of bandwidth between the processor and chipset. It will also allow the processor and internal north bridge to operate at different frequencies as well. With HyperTransport 3.0, the north bridge can operate at 75% of the maximum clock frequency of the processor. AMD roadmaps claim the greater bandwidth of HyperTransport 3.0 is important for PCIe 2.0 and upcoming multi-GPU, integrated graphics and multiprocessor performance.

In addition to HyperTransport 3.0, Stars family processors feature a 128-bit floating point unit for each CPU core, DDR2-1066 support, SSE4A instructions and a split power plane. Split power planes allow the processor and internal north bridge to operate at different voltages and speeds. The advantages of split power planes are it allows the north bridge speed and voltage to never change during Cool’n’Quiet power saving measures. With split power planes the Stars processors require separate PLLs for the processor and internal north bridge.

Stars family processors will use socket AM2+, with the exception of the Agena FX. Nevertheless, Stars family processors will be backwards compatible on socket AM2 motherboards, though performance is sacrificed by falling back to HyperTransport 1.0. AMD's documentation no longer refers to AM3; it appears AM2+ is the expected socket AM3.

Beginning in Q3’2007 AMD is expected to release its first Stars quad-core processors. The new quad-core processors are based on AMD’s Agena and Agena FX cores. Targeting AMD’s 4x4 platform is the Agena FX core. Agena FX will only be available on Socket 1207+ and offer dual processor functionality. The vanilla Agena core will be available on single processor socket AM2+ platforms.

Agena FX and Agena based processors offer identical features. New to the Agena FX and Agena cores is a shared L3 cache. 2MB of L3 cache will be shared between all four processor cores. The L2 cache will be 2MB as well. Clock frequencies of 2.7 GHz to 2.9 GHz are initially expected. The HyperTransport 3.0 frequency for Agena FX and Agena cores is expected to be clocked at 4000 MHz. Agena FX and Agena core processors will be manufacturing using a 65nm process and carry 125W TDPs. The first Agena FX and Agena based processors are expected to arrive in Q3’2007.

AMD will be releasing new Kuma core dual-core processors in Q3’07 as well. The new Kuma core processors feature HyperTransport 3.0 clocked at 4000 MHz, 1MB of L2 cache and 2MB of shared L3 cache. Kuma processors are expected to arrive in 2.0 GHz to 2.9 GHz frequencies for socket AM2+. TDP for Kuma core processors is expected at 89W and 65W.

Single-core products won’t be left out of the Stars family either. AMD will release single-core Rana and Spica cores towards the end of 2007. Rana core processors will be replacing Orleans and Lima Athlon 64 single-core processors while Spica will be replacing single-core Venice Athlon 64 and Manilla Sempron processors. AMD’s roadmap doesn’t reveal too much on Rana and Spica. Nevertheless, Rana and Spica will feature HyperTransport 3.0 and socket AM2+ compatibility.



Comments     Threshold


This article is over a month old, voting and posting comments is disabled

RE: Slip...
By coldpower27 on 11/21/2006 4:04:38 PM , Rating: 2
Perhaps through overclocking, but there isn't any slated SKU's that are 3GHZ level or higher for that core.

I don't expect the Brisbane core to scale that far if at all as AMD concentrates on K8L in Q3 2007 and beyond. Since 2.8GHZ Brisbanes will be launched in Q2 2007, there isn't a dire need for a clockspeed ramp then as K8L is only 1 Quarter away.

And Winchester never got past 2.2GHZ so that SKU wasn't ramped period.

Northwood started life at equal or greater then previous generation Willamette core, no clockspeed was lost period. Pentium 4 Northwood 2.2/2.0GHZ variants were release followed later by lower SKU's.

Conroe is irrelevant as it's architecture philosophy is too different then that of NetBurst to be directly compared to it.

Presler launched at greater speeds then the old Smithfield core, no clockspeed was lost either.

The only one you can vouch for is Prescott which launched at mainstream SKU's first before ramping up clockspeed over time. But again that is a limelight core that needed to be used for a significant period of time.

Brisbane is unlikely to see anything beyond 2.8GHZ, as they will be concentrating on ramping K8L rather then the old K8 derivatives.

It's different because Penryn will be the limelight processor, for the mobile arena, while Brisbane is basically a test platform for the 65nm process for AMD, Agena is the one that would ramp clockspeed.

Smeprons won't turn Dual Core anytime soon, so they aren't Brisbane derivatives, they will likely be based on disabled Lima cores, and they also will likely not scale to far as AMD will be releasing Sempron Spica which is K8L based in Q3 2007 as well.




"Can anyone tell me what MobileMe is supposed to do?... So why the f*** doesn't it do that?" -- Steve Jobs

Related Articles
AMD 65nm Product Plans Unveiled
November 14, 2006, 3:17 PM
AMD Q4'06 Dual-Core Roadmap
October 3, 2006, 8:23 AM
Intel Hints at SSE4
September 27, 2006, 4:00 PM
AMD Announces More K8L Details
June 1, 2006, 2:02 PM













botimage
Copyright 2014 DailyTech LLC. - RSS Feed | Advertise | About Us | Ethics | FAQ | Terms, Conditions & Privacy Information | Kristopher Kubicki