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No matter how many times you click to enlarge, it's still going to be 50nm
Smaller than ever

Samsung Electronics announced today that it has developed the industry’s first 50-nm DDR2 DRAM chip, which will increase production efficiency from the 60nm level by 55 percent. The new 1-Gb DRAM incorporates three-dimensional transistor design and multi-layered dielectric technology, which Samsung says will greatly enhance performance and data storage capabilities.

“With the 50nm DRAM development, we’re continuing our technology leadership, paving the way for our customers to reap not only greater cost efficiencies but also to make superior products,” said Nam Yong Cho, executive vice president of memory sales & marketing at Samsung Electronics’ Semiconductor business.

According to Samsung, the key to the production efficiencies in the newly developed 50nm process is the use of a selective epitaxial growth transistor (SEG Tr). This 3D transistor has a broader electron channel that optimizes the speed of each chip’s electrons to reduce power consumption and enable higher performance. Continued miniaturization of the overall memory circuit and an increasingly limited area of coverage within a wafer cell make it much harder to secure and sustain sufficient volumes of electrons. Adding to the 50nm design improvements, the SEG transistor introduces a multi-layered dielectric layer (ZrO2/Al2O3/ZrO2) to resolve weak electrical features. The new dielectric layer sustains higher volumes of electron to increase storage capacity, ensuring higher reliability in storing data.

Samsung’s new 50nm process technology can be applied to a broad range of DRAM chips including graphics and mobile DRAM. Mass production is slated for 2008.

Another advancement in DRAM was announced from Micron less than a month ago. Rather than shrinking the process, Micron concentrated on ramping up the speeds to develop DDR3 products supporting data rates of 800 MT/s to 1,600 MT/s. Outside of DRAM, Samsung announced in September that it is currently researching Phase-change Random Access Memory, which is expected to replace current NOR flash memory technology.



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RE: DIP Packaging
By saratoga on 10/19/2006 1:20:41 PM , Rating: 1
lol

I do like how their super advanced prototype looks like a 16k EEPROM from 1988.


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