quote: Yes, I'm reasonably certain they have to go CPU1->Northbridge->CPU2 and vice versa.
quote: Well, in this case, I would think the 4 cores can exchange data via the crossbar switch instead of doing it via RAM.
quote: Inter-CPU cache syncs via MESI protocol.
quote: Anything that uses more than one processor... DUH
quote: I am fairly certain I read somewhere that Kentsfield allows the two cores to communicate directly on the chip package and not over the FSB. I will try to dig that up
quote: this means that the cores communicate through the L2 cache crossbar instead of the FSB
quote: Smithfield was two dies, in a single package.
quote: Smithfield is a single die. Presler is basically two Cedar Mills slapped together though
quote: That's why I wondered why AMD didn't do multi-die consumer processors using HyperTransport on the package to communicate between dies