TACHRA processor taped out on the ARISTO architecture
Look out Sunnyvale, look out Fishkill, here comes Tehran

Parsé Semiconductor is a company relatively unknown to in the US, but the company may start making waves if its TACHRA processors take off.  Parsé announced earlier this week that its TACHRA processor has been taped out at 180nm at TSMC.

TACHRA is a V8 SPARC compatible processor based on Parsé's ARISTO architecture -- which is a 32-bit VHDL design.  The TACHRA features an interface for FPU and coprocessors.  Parsé claims the TACHRA chip can obtain approximately 1,400 iterations per second per MHz in Dhrystone benchmarks using the Parsé compiler.  A mid-range Athlon 64 single-core processor can typically pull about 10,000 iterations per second per MHz.

TACHRA will primarily be used for low-power handhelds and other small electronics that need system-on-chip support. Parsé also has another architecture design, dubbed TINY, and specifically designed for ultra-small devices like wireless radios and GPS devices.

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