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AMD and ATI are already planning scalable designs for 2008
"Torrenza" platforms and unified GPU/CPU processors

AMD announced the $5.4B USD takeover of ATI earlier today, but the new company is already making large plans for the future.  Dave Orton, soon-to-be Executive Vice President of AMD's ATI Division, claimed that AMD and ATI would begin leveraging the sales of both companies by 2007.  However, a slide from the AMD/ATI merger documentation has already shown some interesting development plans for 2008.

Specifically, it appears as though AMD and ATI are planning unified, scalable platforms using a mixture of AMD CPUs, ATI chipsets and ATI GPUs.  This sort of multi-GPU, multi-CPU architecture is extremely reminiscent of AMD's Torrenza technology announced this past June, which allows low-latency communications between chipset, CPU and main memory. The premise for Torrenza is to open the channel for embedded chipset development from 3rd party companies. AMD said the technology is an open architecture, allowing what it called "accelerators" to be plugged into the system to perform special duties, similar to the way we have a dedicated GPU for graphics.

Furthermore, AMD President Dirk Meyer also confirmed that in addition to multi-processor platforms, stating "As we look towards ever finer manufacturing geometries we see the opportunity to integrate CPU and GPU cores together onto the same die to better serve the needs of some segments."  A clever DailyTech reader recently pointed out that AMD just recently filed its first graphics-oriented patent a few weeks ago.  The patent, titled "CPU and graphics unit with shared cache" seems to indicate that these pet projects at AMD are a little more than just pipe dreams.

During the AMD/ATI merger conference call, Meyer furthermore added that not too long ago, floating point processing was done on a separate piece of silicon.  Meyer claimed that the trend for the FPU integration into the CPU may not be too different than the evolution of the GPU into the CPU.

Bob Rivet, AMD's Chief Financial Officer, claims the combined company will save nearly $75M USD in licensing and development overlap in 2007 alone, and another $125M in 2008.  Clearly the combined development between the two companies has a few cogs in motion already.




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By jonobp1 on 7/24/2006 11:05:42 AM , Rating: 2
Remember months back when AMD licensed Z-RAM technology to research using in their processor cache? Atleast 5 times the cache density we have now. So if Intel is cramming 24mb+ of cache on 65nm parts couldn't we assume that in perhaps 3 or so years when AMD/ATI start really putting things on the core that we'll have 100mb+ caches on 45nm parts? Besides the fact that they may be almost no latency with on on-die approach this would perform even better than something through hypertransport which certainly would work better than pci-e. I can see ATI focusing on one on-die solution and it's performance would be determined by the amount of cache on the chip. So instead of 50 different forms of an R520 core we'd have cheaper and more expensive cpu's determining your potential graphics workload.


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