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AMD and ATI are already planning scalable designs for 2008
"Torrenza" platforms and unified GPU/CPU processors

AMD announced the $5.4B USD takeover of ATI earlier today, but the new company is already making large plans for the future.  Dave Orton, soon-to-be Executive Vice President of AMD's ATI Division, claimed that AMD and ATI would begin leveraging the sales of both companies by 2007.  However, a slide from the AMD/ATI merger documentation has already shown some interesting development plans for 2008.

Specifically, it appears as though AMD and ATI are planning unified, scalable platforms using a mixture of AMD CPUs, ATI chipsets and ATI GPUs.  This sort of multi-GPU, multi-CPU architecture is extremely reminiscent of AMD's Torrenza technology announced this past June, which allows low-latency communications between chipset, CPU and main memory. The premise for Torrenza is to open the channel for embedded chipset development from 3rd party companies. AMD said the technology is an open architecture, allowing what it called "accelerators" to be plugged into the system to perform special duties, similar to the way we have a dedicated GPU for graphics.

Furthermore, AMD President Dirk Meyer also confirmed that in addition to multi-processor platforms, stating "As we look towards ever finer manufacturing geometries we see the opportunity to integrate CPU and GPU cores together onto the same die to better serve the needs of some segments."  A clever DailyTech reader recently pointed out that AMD just recently filed its first graphics-oriented patent a few weeks ago.  The patent, titled "CPU and graphics unit with shared cache" seems to indicate that these pet projects at AMD are a little more than just pipe dreams.

During the AMD/ATI merger conference call, Meyer furthermore added that not too long ago, floating point processing was done on a separate piece of silicon.  Meyer claimed that the trend for the FPU integration into the CPU may not be too different than the evolution of the GPU into the CPU.

Bob Rivet, AMD's Chief Financial Officer, claims the combined company will save nearly $75M USD in licensing and development overlap in 2007 alone, and another $125M in 2008.  Clearly the combined development between the two companies has a few cogs in motion already.


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By rrsurfer1 on 7/24/2006 10:06:08 AM , Rating: 2
Good point. However, It races through *high-latency* relatively low-bandwidth memory. Cache is much faster/higher bandwidth. There are optimizations you could use there that are impossible to implement with discrete solutions. But like you I agree this would probably be most applicable in the beginning, to low-power laptops.


By SexyK on 7/24/2006 10:17:09 AM , Rating: 3
I don't know why everyone is saying the latency will be lower with this dual socket setup. You're still going to need 256-512MB+ framer buffers and last time I checked, the memory integrated onto discreet graphics cards was WAY faster than the main system memory. In fact that's one of the benefits of discrete graphics, they can keep the memory near the chip and not use sockets etc, which makes routing easier and keeps the clock speeds up.... maybe they'll have a solution for this problem with this dual socket system, but I'm not holding my breath.


By rrsurfer1 on 7/24/2006 10:28:39 AM , Rating: 2
With a good integrated memory controller on-die this would cease to be a problem. If you look it up you'll find DDR2 and DDR3 have roughly comparable bandwidth. The reason is NOT because its faster than system memory, it's because its faster than going off the discrete GPU board, and through the memory controllers and system bus. With an ON-DIE (not dual socket as you stated) GPU, the memory could be shared with the system without the additional latency that discrete boards using system memory have to deal with.


By SexyK on 7/25/2006 12:26:08 AM , Rating: 2
quote:
by rrsurfer1 on July 24, 2006 at 10:28 AM

With a good integrated memory controller on-die this would cease to be a problem. If you look it up you'll find DDR2 and DDR3 have roughly comparable bandwidth. The reason is NOT because its faster than system memory, it's because its faster than going off the discrete GPU board, and through the memory controllers and system bus. With an ON-DIE (not dual socket as you stated) GPU, the memory could be shared with the system without the additional latency that discrete boards using system memory have to deal with.


Huh? I think you're confused. A 7900GTX has over 50GB/s of bandwidth between the memory and the GPU. An AM2 system even maxed out with DDR2-800 only has a theoretical max of ~12.8 GB/s of bandwidth. That is a LOT of ground to make up.


By wingless on 7/24/2006 10:44:20 AM , Rating: 2
This is a good point and Im worried about this too, but we all should know that DDR3 is on its way to the desktop in 2007 and 2008. Also having a CPU and GPU damn near plugged together like a LEGO on this Hypertransport bus may make things very fast. They may show us the coolest tech we've ever seen in 2008 and 9.


By Clauzii on 7/25/2006 5:10:39 PM , Rating: 2
:O

That was a BIG framebuffer :O

I want that 11K x 11K resolution NOW :)


By Clauzii on 7/25/2006 5:13:21 PM , Rating: 2
... as a reply to this: "You're still going to need 256-512MB+ framer buffers..."


By SexyK on 7/25/2006 9:22:08 PM , Rating: 2
quote:
:O

That was a BIG framebuffer :O

I want that 11K x 11K resolution NOW :)


With AA and AF you can fill a 256-512MB frame buffer at much lower resolutions than that.


By Clauzii on 7/26/2006 9:44:50 PM , Rating: 2
My fault :)

I was thinking 2D :(


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