(Source: Jason Mick/DailyTech LLC)
Inheriting the legacy of core-memory, ST-MRAM promises 10x bandwidth, 10x density, and 1/3rd the power vs. NAND

According to a story published by The Nihon Keizai Shimbun's (Nikkei) "Asian Review" section, more than twenty major American and Japanese semiconductor firms have formed a new collaborative alliance, which will work together to develop next generation memory technologies.  The group's aim is to develop consumer-ready magnetoresistive random-access memory (MRAM).  MRAM is a technology that some are hoping will replace both long term storage devices (e.g. magnetic hard disc drives and Flash storage) and volatile memory (e.g. DRAM).

I. A Brief History of Memory

Since the modern computer was first devised in the 1940s a perpetual problem has been the inability to find a memory technology that could store data for long-periods of time when powered off (nonvolatile memory), but which would provide comparable speed to powered alternatives (volatile memory).

Even the earliest computers divide memory into nonvolatile storage technologies and volatile (powered) memory devices.  

Historically a number of nonvolatile storage methods were used commercially, including drum memory and magnetic-core memory, plus its derivative variants plated-wire, thin-film, and twistor memory).
Twistor memory 
Twistor Memory
Twistor memory
Twistor memory was an advanced, mass-producible form of volatile core-memory, a powered magnetic storage technology, which was used briefly by the telecommunications industry and military. [Image Source: Old Computer Online Russia]

Since the late 1980s the predominant form of storage in personal computers have been the hard disc drive (HDD), which traditionally was a mechanical construct that stored digital data on a spinning magnetic disk.  In the last decade NAND flash-memory has slowly replaced the hard disk, while keeping the same 3.5-inch and 2.5-inch form factors (which are renamed solid state drives (SSDs) to denote the switch from magnetic disks to solid state logic circuit).
NAND and NOR cells
Flash memory is composed of NAND or NOR cells. [Image Source: Toshiba]

Still HDDs have managed to remain viable thanks to higher densities at given price points than SSDs.

Seagate's 500GB Ultra Mobile HDD (pictured on the left), along with older variants (middle, right)

Advantages of SSDs include lower power usage and dramatically faster data reading/writing.  In terms of longevity SSDs are more predictable in terms of degradation over time (in that they do not suffer from the sudden seemingly random mechanical component failures that HDDs do), but do not always have the longevity of HDDs.

An SSD from OCZ Technology Group Inc. (OCZ) with NAND Flash memory built on a 19 nm process

Both HDDs and SSDs in modern machines can serve as memory to store data for running programs in a crunch via page files in modern operating systems.  However, such storage is typically done sparingly as even SSDs are still significantly slower than modern consumer volatile memory technologies.

As nonvolatile storage evolved, volatile storage -- which requires power to maintain its information -- also evolved.  Early examples included the Williams–Kilburn tube which used cathode ray tubes (CRTs) to store data and delay line memory (which stored signals in viscous liquids such as mercury).

Delay line memory
Mercury-based  delay-line memory was used for volatile data storage in the Univac-1 (1951) mainframe. [Image Source: Wikimedia Commons]

Throughout much of the history of the computer a single technology has dominated the volatile storage market -- dynamic random access memory (DRAM).  DRAM was introduced to the market in 1970 by Intel Corp. (INTC).  Intel's first chip had only 1 KB (8 kilobit (Kb)) of dynamic storage -- by contrast today's DRAM chips have Gigabits (Gb) of storage.  But the fundamental unit of digital data storage for DRAM has remained relatively unchanged over the years on a conceptual level.

DRAM chips -- from the 8 Kb 1970 Intel chip, to modern 8 Gb chips by the likes of Samsung Electronics Comp., Ltd. (KSC:005930) -- is comprised of "cells" consisting of a single capacitor and single transistor.  Given its simplistic solid state cells, DRAM has thus been inherently tied to the progress in transistor logic -- a trend that has allowed DRAM to scale over the years, keeping it cheap and fast.

There's been some push to explore alternatives to the fundamental transistor+capacitor cell design of DRAM.  Chipmakers have considered either eliminating the capacitor (e.g. Z-RAM (zero capacitor RAM), a technology under development by Advanced Micro Devices, Inc. (AMD), or TT-RAM (twin-transistor RAM)) or altering the basic cell (e.g. T-RAM (Thyristor RAM)).  But these efforts have yet to produce marketable devices, while DRAM's time-honored cell design continues to dominate.
DRAM manufacturing
The DRAM cell (bottom left) has remained relatively the same, but the manufacturing technology has kept it competitive for decades. [Image Source: IEDM]

To date most of the research in terms of volatile memory has focused on perfecting manufacturing processes and data transfer technologies for DRAM (e.g. the double data rate (DDR) standards, DDR, DDR2, DDR3, DDR3L, DDR4, LPDDR4).  These process and controller improvements have allowed DRAM to stay ahead of nonvolatile storage for decades in terms of speed, while staying competitive in terms of active power consumption.

II. The "Holy Grail" of Memory Tech

For decades researchers have been trying to find a nonvolatile technology that could rival volatile memory (namely DRAM) in terms of active power effiency and read/write speeds.  Such a device would allow for a machine with "unified" memory, significantly simplifying the architecture of the modern PC.  For that reason unified memory has been oft referred to as the "Holy Grail" of memory technology.

The memory industry's first serious crack at unified memory was arguably bubble memory.  Inspired by core-memory, this magnetism-based storage technology was developed at Bell Labs in the mid-1970s and reached the market in commercial form in 1977.  But it ultimately fell short of hopes, replaced by Flash memory and faster hard drive technology.

Intel Bubble MemoryBubble memory
Bubble Memory was among the first technologies considered a possible memory unifying devices.
[Image Source: Wikimedia Commons]

Flash memory was also for a time considered as a possible unified memory technology.  But at present while Flash memory is cheaper than DRAM, it is not quite fast enough to replace it in most devices.

DRAM chips
DRAM remains much faster at data transfer than NAND Flash. [Image Source: Samsung]

For example, 8 GB (16 x 4 Gb) of DDR3-1333 chips cost around $16 USD [source] and have a peak data transfer rate of around 10.6 GB/s [source].  By contrast an 8 GB (64 Gb) NAND flash module costs is less expensive at around $7 USD, but can only get around 260 MB/s for its fastest operation (sequential reads).

MRAM appeared to be another such dead end -- its proponents hailed it as a potential unified memory technology, yet today it only occupies a niche market, slowly displacing SRAM (static RAM (SRAM), a type of RAM that "latches" values, not requiring a refresh) in the RAID controller market.
Toggle MRAM
Toggle MRAM appeared to be another dead-end, limited by the applied magnetic field on the bit line. [Image Source: Storage Bytes Now]

Yet, there's fresh hope, thanks to a new kind of MRAM.

Traditional MRAM is so-called "toggle" MRAM (T-MRAM), which in some ways inherits the legacy of core-memory, storing data in tiny magnetic fields based on crossed wires.  Production difficulties aside, a pivotal roadblock for T-MRAM is that it can only be made so small before one cell's magnetism interferes with neighboring cells.  This limit on densities in term limits cost and performance.

The solution came via the invention of the magnetic tunnel junction (MTJ) device, a device which did not need a magnetic field -- only current to switch polarity.  In the MTJ, one side's electron spins are always oriented magnetically in a specific direction, while the other side's electrons are free to switch directions when a current is applied.  This technology was henced named spin-torque MRAM (ST-MRAM).

The magnetic tunnel junction device allowed a new kind of MRAM. [Image Source: KISTI]

As no bulky writing magnetic field is applied, inter-cell magnetic interference is dramatically reduced, allowing far denser circuits.

III. Slowing DRAM Gains Open the Door to Memory Unification

DRAM is looking a bit long in the tooth these days.  Unlike transistors, which companies Intel and Samsung believe can be shrunk of several nm (with the best designs currently produced at 14 nm), DRAM is facing an inherent roadblock due to its capacitor.

DRAM processes
DRAM has used 3D designs to help offset the reduction in capacitor area from die shrinks. [Image Source: Advances in Solid Circuit Tech.]

Capacitance is directly dependent on area.  As the size of the memory cell has shrunk, the area shrunk smaller and smaller.  DRAM producers have offset this somewhat by using 3D capacitor technologies -- either making a well in the chip or some sort of fin/cylindrical extrusion.  But even with this, they've had to continually cut the thickness of the dielectric smaller and smaller.
die size v. capacitance
The ability for capacitance to keep up with die shrinks has been limited by minimum dielectric thickness. [Image Source: Advances in Solid Circuit Tech.]

For that reason DRAM density growth is now being outpaced by growth in transistor-circuit (e.g. CPU) density.
DRAM density growth has slowed over the last half decade.
[Image Source: Advances in Solid Circuit Tech.]

The memory industry's answer is to stack DRAM into 3D structures.  In the NAND space, 3D is already the golden standard.  

One example of a V-NAND (3D) technology [Image Source: Micron]
3D NAND styles
[Image Source: IMW 2011/Nikkei Electronics]

Implementations vary somewhat, but all the top manufacturers have turned to some sort of vertical-NAND (V-NAND) in recent years, which has allowed for steady gains in NAND storage densities.

NAND Cell Tech
[Image Source: Nikkei Electronics]

Looking at the DRAM cell designs you'll notice that the capacitors have become large and or complex.  For this reason it's been quite difficult to get a functional vertical-DRAM (V-DRAM) device (also known as a "hybrid memory cube") at current nodes.  Micron Technologies Inc. (MU) has cracked this barrier and is currently sampling hybrid memory cubes, with small volume production expected to reach commercial clients next year.

hybrid memory cube
V-DRAM ("hybrid memory cubes") are expected to compete with ST-MRAM.

The struggle to produce working hybrid memory cubes has left the door open to new technologies, such as resistive RAM (ReRAM) -- another nonvolatile entrant that's based on the "memristor", a component theorized in 1971 but not produced until a 2008 breakthrough at a Hewlett-Packard Comp. (HPQ) lab.  Crossbar, Inc. -- a stealth startup backed by U.S. Defense Advanced Research Project Agency (DARPA) -- a flashy unveil early this year and is promising a unified memory product in the next couple years.  And yet, to our knowledge no company has sampled ReRAM to date to customers -- even in the pricier enterprise segment.

IV. ST-MRAM is Already Here, but Price is Too High For Most Uses

That is good news for ST-MRAM.  Unlike ReRAM, ST-MRAM burrows conceptually from the already proven T-MRAM.  In fact, ST-MRAM is already sampling.  EverSpin Technologies, Inc. is sampling a 64 Mb (8 MB) ST-MRAM chip that performs at DDR3 speeds.  While small in terms of modern storage or DRAM capacities, that chip has already found a home in at least one upcoming commercial product line, the SS6 series SATA III SSDs sold under Melco Holdings Inc.'s (TYO:6676) "Buffalo" brand.  These new drives are expected to launch in 2015.
EverSpin ST-MRAM
EverSpin's 64 Mb (8 MB) ST-MRAM modules will find a home as cache chips in high-end SSDs in 2015.

Announced earlier this month and marketed towards enterprise customers, the pricey drives prevent data loss in a power outage.  Currently most enterprise technologies use energy storage technologies to store enough juice to power the in-pipe data out of the DRAM cache in the case of power loss.  Reportedly, the ST-MRAM solution (which is nonvolatile and hence requires no power storage) is relatively competitive price-wise.

ST-MRAM costs an estimated 50 times more to make than a Flash chip, according to EverSpin (so an 64 Mb chip costs almost as much as a 4 Gb flash chip).  The biggest advantage of ST-MRAM over NAND Flash memory is its data transfer rate.  EverSpin's current spin-torque chips can achieve dual-channel data transfer of 3.2 GB/s (putting it on par with DDR3-800); by contrast the best NAND chips get less than a twentieth of that, with an average data transfer rate of around 0.28 GB/s [source].  

In other words the performance of currently available MRAM is great -- but the densities aren't.

That's where the new coalition of industry players comes in.  The team reportedly includes Tokyo Electron, Ltd. (TYO:8035), Shin-Etsu Chemical Comp. Ltd. (TYO:4063), Renesas Electronics Corp. (TYO:6723), Hitachi, Ltd. (TYO:6501), and Micron -- an American firm who has Japanese ties thanks to its July 2012 purchase of veteran Japan memory chip designer Elpida.
Crucial Drive products
Micron -- who owns the Elpida and Crucial brands -- belives MRAM is the next major advance in memory technology.

The coalition believes that by 2017 they will have produced optimized ST-MRAM that's similarly priced to DRAM, but can be produced at 10 times the density, has 10 times faster write speeds than DRAM, and consumes only a third of the power.  ST-MRAM will replace DRAM and NAND in the alliance members' product streams in 2018, according to the report.

The report describes the optimization effort, writing:

The companies will dispatch a few dozen researchers to Tohoku University in northern Japan. Led by Tetsuo Endoh, a professor at the university, the team will start development in February. The plan is to encourage other U.S. and European companies to join the project as well. 

Tohoku Univ., Japan's third oldest university, is no stranger to ST-MRAM.  While magnetic tunnel junction devices were characterized as early as 1996, Tohoku Univ.'s Professor Koichiro Inomata was one of the first researchers to recognize their potential and develop them into a form usable in MRAM devices.  His 2004 work on ST-MRAM cells in Nature Materials is one of the most cited papers in the field.

Tohoku University
The engineering building at Tohoku Univ. [Image Source: Reid Our Blog]

Professor Tetsuo Endoh was trained by Professor Fujio Masuoka at Tohoku Univ.  Professor Masuoka is hailed by many as the father of Flash memory, having pioneered much of the crucial steps in making flash memory affordable enough to be a true HDD replacement.  Now Professor Endoh has taken the reins from the retiring Professor Inomata, spearheading the development of ST-MRAM.

Prof. Endoh
Professor Tetsuo Endoh's lab at Tohoku Univ. is leading the collaborative effort. [Image Source: JST]

This is not the first major industry tie up.  In 2011 SK Hynix Inc. (KRX:000660) and Toshiba Corp. (TYO:6502) signed a similar agreement to jointly develop ST-MRAM.  Oh Chul Kwon, Hynix’s CEO, remarked:

MRAM is a rare gem full of exciting properties, like ultra high-speed, low power consumption, and high capacity, and it will play the role of key factor in driving advances in memories. It will also be a perfect fit for growing consumer demand in more sophisticated smart phones. MRAM is our next growth platform.

But the new alliance -- which includes Micron, the world second largest memory producer -- is by far the biggest industry research group to back the emerging technology, which has been slowly maturing over the past two decades.  In many ways MRAM is a nanoscale implementation of core-memory.  In that regard, MRAM might be regarded as the eternal underdog to rival storage technologies.

The underdog may at last be on the verge of becoming the dominant storage technology, delivering on the promise of unified memory at last.  

V. What About PRAM, ReRAM, Millipede Memory, etc.

But as Samsung Electronics Comp., Ltd.'s (KSC:005930recent roadmap shows, this is just one of several technologies vowing for this title.  In addition to the aforementioned ReRAM, there's also phase-change RAM (PRAM), a technology based on chalcogenide glass.

MRAM v. DRAM, etc.

Still, the picture is looking pretty good for ST-MRAM.  It's less mature than PRAM (also called phase change memory (PCM)) -- but PRAM so far has yet to show anywhere near the transfer rates of ST-MRAM.  Hence ST-MRAM is a serious contender to unify device memory and storage; PRAM does not appear to be.

Samsung has been sampling PRAM since 2006.  Last February at a International Solid-State Circuits Conference 2012 (IPSSCC) presentation Samsung showed off an 8Gb (1GB) 20nm chip in Feb. 2012.  This was 128 times the density of EverSpin's ST-MRAM chips, but only 1/16th of the density of Samsung's highest density V-NAND chips at the time (128 Gb).

Write speeds are better than NAND Flash, comparable to NOR Flash, but much slower than ST-MRAM at 40 MB/s for a per-byte read operation.  Of course, since then "average data transfer rates" well in 200-300 MB/s range for NAND Flash SSDs have been reported.

Performance is limited by the time necessary to melt the glass, allowing it to transition from amorphous to crystalline or back.  That transition takes 100 nanoseconds or more in the chips developed in 2012.  That said, new research from Samsung [PDF] indicate that new PRAM chips with 14 ns latencies may perform at twice the speed of Samsung's fastest experimental 256 Gb NAND chips.

Chalcogenide glass
Built of chalcogenide glass, PRAM is expected to be an interim NAND replacement/supplement, while the industry waits for ST-MRAM to mature[Image Source: Univ. of Southampton]

It's important to mention that a critical selling point of PRAM is longevity.  As long as it's maintained at normal room temperatures, it can survive 100 million writes per sector -- versus 5,000-10,000 for NAND flash.

Micron itself is backing PRAM as well.  It announced in July 2012 that it would sample a 1 Gigabit (128 MB) PRAM chip attached to a 512-Mbit LPDDR2 DRAM chip, targeting the mobile market.  This support could be interpreted as a signal of uncertainty on MRAM, but based on what samples of each technology have shown it's more likely that Micron views PRAM as an interim measure as ST-MRAM matures to higher densities.
 Memory tech summit comparison
A comparison of different memory technologies from a 2011 Micron presentation, which while a bit outdated gives an idea of how PCM/PRAM stacks up compared to NOR/NAND flash and DRAM. [Image Source: Micron]

ReRAM may yet pose a worthy challenger to ST-MRAM, but for lack of samples it's hard to say what kind of average data transfer rates can be expected.  The same goes for other exotic technologies that appear even farther from commercialization, such as "racetrack" memory, ferroelectric RAM (FeRAM), "Programmable Metallization Cell" (PMC... not to be confused with PCM) memory, SONOS/SHINOS memory chips, "Nano RAM" (carbon nanotube memory), and millipede memory.

Millipede memory
Millipede memory -- a nanopit-based technology -- may complement MRAM for higher-density specialty storage, though it's expected to be very expensive. [Image Source: IBM/Nature]

In other words the industry is racing to shrink ST-MRAM and reduce its costs as a potential replacement to NAND and/or ST-MRAM.  And Tohoku Univ. looks to play much the same role it did for commercializing NAND in the 1990s -- serving as a critical nexus of industry partnership and progress.

Source: The Nihon Keizai Shimbun

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