Source: The Korea Times
quote: Both CPU cores are able to run 32-bit and 64-bit ARM code, as well as a mix of both so long as the OS is 64-bit.
quote: Speaking at ARM TechCon 2011 in Santa Clara, Calif., ARM Chief Technology Officer Mike Muller said the new v8 architecture would consist of two main execution states: AArch64 and AArch32, with the former introducing a new A64 for 64-bit processing instruction set, while the latter would continue to support ARM’s existing instruction set.“ARM V8 fully supports 32 bit ARMv7a software,” said Muller, adding that the architecture had been designed to “maximize the benefits across both 32-bit and 64-bit application areas."
quote: AArch32The ARMv8 32-bit execution state, that uses 32-bit general purpose registers, and a 32-bit program counter (PC), stack pointer (SP), and link register (LR). AArch32 execution state provides a choice of two instruction sets, A32 and T32. Operation in AArch32 state is compatible with ARMv7-A operation.AArch64The ARMv8 64-bit execution state, that uses 64-bit general purpose registers, and a 64-bit program counter (PC), stack pointer (SP), and exception link registers (ELR). AArch64 execution state provides a single instruction set, A64.
quote: Of course, for compatibility reasons, we still support the entire ARMv7 machine in the new ARMv8 architecture, but when running 64-bit software, this part of the machine is not being used, and the area of complex legacy it had built up does not need to be active when running in the 64-bit ISA, unlike other architectures where 64-bit extension was simply added to the historical complexity and legacy of their 32-bit mode.It is not possible, for example, for a 32-bit hypervisor to support a 64-bit operating system while executing in the HYP mode.However, it should be noted that the halting debug view is no longer compatible with tools that today support ARMv7 halted debug even if the processor is running only 32-bit code. For this to work it will be necessary to have the debugger updated to support ARMv8. Self hosted AArch32 debug used by an OS however does not change.For this reason, the ARM processors will run today’s 32-bit software without alteration and as such no impact to the ecosystem. Only key targeted areas of software will initially need to consider operating within A64 instruction set. The first is likely to be a hypervisor or any secure monitor code in such a system. Since the new hardware accelerated virtualization was first introduced in the Cortex-A15, which already supported much of the new page table format, updating such a hypervisor is manageable and many vendors have already started.