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If the major DRAM manufacturers fixed prices from 1998 to 2002, they're about to pay for it

A saga that has been cumulating for the last eight years is about to take another major step.  Seven of the major eight DRAM manufacturers will face a major antitrust complaint filing tomorrow lead by Attorney General Bill Lockyer.  Lockyer's filing for the State of California will be followed by additional suits in thirty-three more states shortly after.

The complaint claims that between 1998 and 2002 seven manufactures colluded to "fix DRAM chip prices, artificially restrain supply, allocate among themselves the production of DRAM chips and markets for the chips, and rig bids for DRAM chip contracts."  When the complaints are filed tomorrow, July 14, the following companies will be named:

  • Elpida Memory (Japan)
  • Hynix Semiconductor (South Korea)
  • Infineon Technologies AG (Germany)
  • Micron Technology (USA)
  • Mosel Vitelic (Taiwan)
  • Nanya Technology Corp. (Taiwan)
  • NEC Electronics America (USA)

Interestingly enough, the world's largest DRAM manufacturer, Samsung, is not listed in the claim.  Samsung had a DRAM market share of roughly 30% at the time and has been found guilty of price fixing during that same period.  In March of 2004, the FTC dropped an antitrust case against Rambus, to which Rambus turned around and sued Infineon, Hynix and Micron for artificially decreasing the price of DRAM to hurt the proliferation of RDRAM. Samsung, Rambus' major producer of RDRAM at the time, was also absent from these accusations.

The alleged collusion hurt the bottom line of several PC manufacturers at the time.  The suit to be filed by Lockyer names several manufactures, including Apple, Compaq, Dell, Gateway and IBM.

An excerpt from one of the claims reads "The manufacturers did not limit this pricing coordination to isolated or occasional conversations. On the contrary, during a roughly four-year period, there were frequent pricing communications among the conspiring manufacturers, exchanges that intensified in the days immediately preceding the dates on which they submitted bids to supply DRAM to the (computer makers), their largest and most important customers."

The industry certainly hasn't been without its share of shakeups.  In March of 2006, four Hynix executives were found guilty of price fixing, and are currently serving jail time.  Three Samsung executives were also found guilty, and Elpida was fined for price fixing too.

The suits seek retribution for the three year price fixing period, and will also impose penalties if the defendants are found guilty.

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By TIG on 7/18/2006 9:03:45 PM , Rating: 2
DRAM arrays taken independant of any controller having been disingenuously been characterized as 'asynchronous' and ignoring of bank-interleaved arrays of burst transfer DRAMS which were also swept under the rug in the typical Rambus practice of the litigation process, the following ensued:

<<1290. When Dr. Horowitz began working on what was to become RDRAM he had extensive experience in asynchronous designs.>> McGuire, FTC ID

In fact, the asynchronous discipline that Horowitz was involved in and aware of was more a more technically specific discipline. This is partially evidenced in the following presentation:

Horowitz was involved and active in the development of asynchronous pipelines and would have every reason, as such, to have been aware of the work described in this paper:

"Transition Signalling
In transition signalling any transition, either rising or falling has the same meaning, as illustrated in Figure 2; either kind of transition is called an event. As indicated in the figure, and suggested by its name, transition signalling avoids distinctions between the two types of transition even though they may look quite different. In effect, all responses to transition signals are edge triggered, and are triggered on both rising and falling edges. Because transition signalling uses both rising and falling edges as trigger events, it may offer twice the speed potential of conventional clocking."

- Ivan E. Sutherland, "Micropiplines", Communications of the ACM, Vol. 32, No. 3, June 1989 - 1988 ACM Turing award lecture.

Also in this paper:

"Finally, memory systems obviously fit well into the micropipeline framework. One might design a dynamic random access memory (DRAM) part using a micropipeline.Such a part can provide at least a factor of two improvement in throughput over conventional DRAM parts."

"We can't expect users to use common sense. That would eliminate the need for all sorts of legislation, committees, oversight and lawyers." -- Christopher Jennings
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