DailyTech - Intel "Socket P" Decoded

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Hardware Intel "Socket P" Decoded
Anh Tuan Huynh (Blog) - July 7, 2006 11:09 AM

25 comment(s) - last by peternelson.. on Jul 11 at 7:42 PM

The dummy pins on Intel Socket P are rotated 90 degrees

Intel "Santa Rosa" block diagram

New mobile socket for "Santa Rosa"

DailyTech has come across a roadmap outlining Intel’s upcoming Socket P mobile processor socket. "Socket P" will part of Intel’s next generation Santa Rosa mobile platform and will continue to be a pin-grid array based socket unlike the land-grid array based desktop processors. There will be no backwards compatibility with "Socket P," as it will be keyed differently than the current Socket M. Socket P processors will have pins A1 and A2 removed unlike pins A1 and B1 of current Socket M processors. Sacrificial "Corner Balls" will also be introduced with Socket P for greater differentiation with Socket M processors. Intel's guidance clearly states:

Not pin-compatible with Intel Core 2 Duo for Napa, or Intel Core Duo T2500

Intel’s Santa Rosa platform is expected to launch in 1H’07 with new Socket P based Core 2 Duo processors. Santa Rosa is the next major revision to Intel’s successful Centrino mobile platform and will bring a new chipset and Intel’s Robson technology. At the heart of Santa Rosa will be the upcoming Crestline GM965 Express chipset with a fourth generation integrated graphics core that will be a derivative of Intel’s GMA X3000 found on desktop G965 Express chipsets.

Socket M still has some life in it, however. Before Intel launches Santa Rosa early next year, Intel will release Merom processors in August which will run on current 945M and 945GM chipsets. This will be known as the Napa "refresh." Users should be able to use first-generation Merom processors in their current notebooks provided that their BIOS supports the new microcode.

Intel has not stated how long the new socket will last, although Socket M stuck around for more than three major CPU revisions.

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RE: LVDS?

By johnsonx on 7/7/2006 7:30:52 PM , Rating: 2

Well usually that's Low Voltage Differential SCSI, but obviously not in this case. In this case I think LVDS has to do with the interface between a notebook graphics chip and the LCD display.

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