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New processes push technology to the verge of commercialization

International Business Machines, Inc. (IBMis among the companies racing to develop nanophotonics -- on-die light based signaling components -- which can be incorporated directly side-by-side with traditional silicon-based electronics using traditional manufacturing techniques like complementary metal-oxide semiconductor (CMOS).

Currently, signals between components like the processor cores and the memory crawl along as electrons along copper-based wires.  In the new scheme modulators (which create the signal, often using a ring), wave-length multiplexers (which route signals), switches (which turn signals on or off), and detectors (which receive signals) are baked onto silicon chips connected by fiber optics.  Signals then travel at the speed of light along fiber optic channels.

After first demoing the technology in crude proof-of-concept form back in 2010, IBM has returned with the world's smallest announced CMOS-compatible nanophotonics processes.  The company showed off chips this week that were build on a traditional 90 nm CMOS node, a node far smaller than earlier prototypes.

IBM wave guide
Blue optical wires are shown accelerting the "slow" copper wire (orange) traffic.

IBM says the technology is "primed for commercial development" and will soon be ferrying "terabytes of data between distant parts of computer systems".  In a demo IBM showed off 25 gigabytes-per-second (GBps) transfer rates, a speed typically seen in bulky telecommunications fiber-optics equipment, not in PC interconnects, which crawl along at megabytes-per-second (or around 1 Gbps for high-speed PCI-express lanes).

The hope is that the new interconnects will soon pump internal and external communication up to speeds of up to thousands of times the current technology.

Dr. John E. Kelly, Senior Vice President and Director of IBM Research, remarks, "This [latest showcased] technology breakthrough is a result of more than a decade of pioneering research at IBM.  This allows us to move silicon nanophotonics technology into a real-world manufacturing environment that will have impact across a range of applications."

The IBM research fellow and SVP will be showing off his work in a paper at the IEEE International Electron Devices Meeting (IEDM), which is being held this week in San Francisco, Calif.

Sources: IBM [1], [2]

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By CityZen on 12/10/2012 1:13:46 PM , Rating: 2
In a demo IBM showed off 25 gigabytes-per-second (Gbps) transfer rates, a speed typically seen in bulky telecommunications fiber-optics equipment, not in PC interconnects, which crawl along at megabytes-per-second.

Wait! what? PCIe v3.0 bandwidth is already in the 1 GB/s range, per lane (16 GB/s for a 16 lane slot), and v4.0 will be double that.

RE: Bandwidth
By KentState on 12/10/2012 1:19:48 PM , Rating: 3
Every lane would be 25GB/s. Hopefully fewer lanes would lead to less complex motherboards.

RE: Bandwidth
By Egglick on 12/10/2012 1:40:55 PM , Rating: 2
Yeah, a single 25GB/s lane would be enough for most any current consumer-level addon card. The biggest benefit would be to the System RAM though. This sort of technology would both drastically increase bandwidth, and also lower latency to almost nothing. You could theoretically see system RAM which comes close to the speed of the CPU's onboard cache.

RE: Bandwidth
By jdietz on 12/10/2012 4:13:04 PM , Rating: 2
No it won't. It'll be closer to being a "true" L4 cache.

Modern system latency:
Register: Next cycle
L1 Cache: 4 cycles (Ivy Bridge)
L2: 12 cycles (Ivy Bridge)
L3: 24 cycles (Ivy Bridge)
RAM: 133 cycles (Ivy Bridge @ 3.4GHz)

This tech may help reduce RAM latency. Not sure exactly how much. Other tech might help more at reducing latency, like phase-change RAM.

RE: Bandwidth
By Egglick on 12/10/2012 6:17:35 PM , Rating: 2
Of course I'm not talking about using existing DRAM technology. You would want to design something entirely new in order to take advantage of the exponentially faster interconnects.

RE: Bandwidth
By Digimonkey on 12/10/2012 6:47:08 PM , Rating: 2
Is that really the case? You usually don't measure a serial connections in bytes.

RE: Bandwidth
By Digimonkey on 12/10/2012 6:51:13 PM , Rating: 2
Nevermind, I see it was meant to be 25 Gigabits.

RE: Bandwidth
By kingmotley on 12/10/2012 1:52:18 PM , Rating: 2
You are correct that PCIe v3.0 bandwidth is currently ~8Gbps per lane (over copper).

However, this technology is ~25Gbps per transceiver, over fiber. And multiple transceivers can be used on a single fiber. You could conceivably multiplex all 16 "lanes" into a single fiber with this that would have ~3 times the bandwidth, and all the benefits of a single fiber (longer runs, less signal degradation). Of course you could also run multiple fibers. Think 16 fibers running 16 channels, each 3 times as fast as a single PCIe v3.0 lane.

** I used 16 channels as an example that could be multiplexed, but I didn't see a limit from the story. It could be anywhere from 2 to a jillion for all I know.

RE: Bandwidth
By Argon18 on 12/10/2012 3:42:59 PM , Rating: 2
At least with current telecom WDM, 16 colors is commonplace, and 256 colors is getting popular.

You're right in that the theoretical limit approaches infinity, since there are an infinite number of color variations in the visible light spectrum, and that doesn't even include infra red or ultra violet combinations.

Of course in practical terms however, it's a matter of diminishing returns, as the more colors you use, higher grades of optical fiber are required that accurately transmit the light without distortion or db loss, and more sensitive transceivers are required to pickup the signal at the other end. At a certain point, it becomes cheaper to just lay another physical cable.

RE: Bandwidth
By bobsmith1492 on 12/10/2012 4:45:01 PM , Rating: 2
It doesn't approach infinity; the standard RF bandwidth limitations apply. Of course there is a ton more spectrum available than in the RF range.

RE: Bandwidth
By Jaybus on 12/11/2012 11:53:33 AM , Rating: 2
I think the point of this technology is being overlooked. The point is not exactly a cheaper version of the i/o over fiber optic technology we already use. It is replacing the electronic bus connecting one chip with another, for example a memory channel or QPI. More yet, it is about connecting together multiple chips so that they may act almost as if they are a single monolithic chip by making the latency and bandwidth of chip-to-chip links comparable to on-die links.

Wrong acronym
By kingmotley on 12/10/2012 1:40:56 PM , Rating: 2
In a demo IBM showed off 25 gigabytes-per-second (Gbps) transfer rates

No, Gbps is gigabits-per-second. Which is 1/8th the speed of gigabytes-per-second.

RE: Wrong acronym
By greywood on 12/10/2012 7:36:45 PM , Rating: 2
Uhh.. look again, dude. They really did say giga bytes per second - (GBps) as in capital "B". That SCREAMS!!

RE: Wrong acronym
By Kyuu on 12/10/2012 9:56:18 PM , Rating: 2
According to the source article, it's Giga bits per second (G b ps). Mick either got it wrong, or is basing the G B ps on a different source. I think Gbps is more likely, given that serial connections are usually measured in bits, not bytes.

RE: Wrong acronym
By LRonaldHubbs on 12/11/2012 5:56:00 AM , Rating: 2
kingmotley is correct. The source article from IBM says 25G b ps.

RE: Wrong acronym
By Chocobollz on 12/11/2012 1:12:00 PM , Rating: 2
I think it should have been written as either Gibibit/s or Gibibyte/s to avoid confusion >.>

This is cool
By Ammohunt on 12/10/2012 1:40:50 PM , Rating: 2
For Super computing this is huge transferring data between processor nodes on the other side of the room would be like talking across the local bus.

RE: This is cool
By Argon18 on 12/10/12, Rating: 0
RE: This is cool
By bill.rookard on 12/10/2012 6:21:44 PM , Rating: 4
Respectfully disagree. I'm sure that nobody ever thought that consumers would ever need multi-terabyte storage systems, multi-core processors, solid state storage drives, or even portable computers. These days, a company is behind the times if they don't offer it.

The gist is that all technology (even military up to a point) will continue to trickle down into the consumer space given enough time as the technology develops. Eventually it may come down to the point where you slide an expansion card into a bay, and connect an optical cable between it and the processor as it only uses the slot for providing power.

RE: This is cool
By greywood on 12/10/2012 7:44:50 PM , Rating: 2
Oh, ye of little faith. They already have this down to the chip level - and its just a proof-of-concept prototype! If they can get it down to even 2 or 3 process-nodes behind current silicon, it will be cheap enough for enthusiast PC motherboards. Anybody up for 100 GB/second (or faster) graphics?

Technology is already in production
By siliconman on 12/11/2012 10:34:30 AM , Rating: 2
Molex offer 56 Gb/s cables built with this technology but not made by IBM ( The first to market with a silicon nanophotonics chip is a start-up called Luxtera. More details on the technology here

By wwwcd on 12/11/2012 10:59:18 AM , Rating: 2
Yes, but that not enough! We want more manufacturers and more product for a multiplying competition.

By wwwcd on 12/11/2012 8:46:17 AM , Rating: 2
We live on demos! We wish a real products! We have no more time to waste!

"I mean, if you wanna break down someone's door, why don't you start with AT&T, for God sakes? They make your amazing phone unusable as a phone!" -- Jon Stewart on Apple and the iPhone

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