TSMC Demonstrates Dual-core Cortex-A9 Operating at Over 3GHz
May 3, 2012 2:00 PM
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28 nm design is likely to be the most powerful ARM architecture core yet; perfect for PCs
ARM Holdings plc (
) has long been known for its lightweight intellectual property cores, which have dominated everything from slot machines to smartphones. Power and ARM cores weren’t typically words you heard uttered in the same sentence. But with ARM preparing to
invade the laptop space
, courtesy of
Windows 8 RT
(ARM edition), the world is getting its first taste of ARM cores clocked at the speeds usually reserved for PC users.
Taiwan Semiconductor Manufacturing Comp., Ltd. (
) today announced an important milestone, achieving a stable core clock of 3.1 gigahertz with a Cortex-A9 dual-core chip. The air-cooled chip, built on TSMC's
new 28 nm process
, typically operates at lower clock speeds. However, the chip is capable of overclocking to over 3 GHz when performance demands it -- much like rival Intel Corp.'s (
The chips typically cruise at a more battery-friendly 1.5-2.0 GHz. Thus, while partners' proprietary designs based on the rapidly maturing process will likely be targeted primarily at the laptop market, there's also the possibility of seeing such speedy designs in tablets or even smartphones.
ARM and TSMC are showing that Intel isn't the only one who can play the speed game, showing off a 3 GHz core. [Image Source: Maximum PC]
Cliff Hou, TSMC Vice President, Research & Development, brags, "At 3.1 GHz this 28HPM dual-core processor implementation is twice as fast as its counterpart at TSMC 40nm under the same operating conditions. This work demonstrates how ARM and TSMC can satisfy high performance market demands. With other implementation options, 28HPM [high performance mobile] is also highly suited for a wide range of markets that prize performance and power efficiency."
ARM Holdings and allies like TSMC need the strong showing. While they have tremendous potential for growth if they can capture some laptop market share from Intel, they're also facing a counterattack on the smartphone front from Intel.
Intel's first generation
chips have finally arrived in a limited selection of smartphones, and battery life has been
better than expected
. Competition will heat up in 2013 when Intel swaps the 32 nm node Atom Medfield's for
a die-shrunk 22 nm version
, featuring Intel's
power-saving 3D tri-gate transistor design
In other words ARM, et al. and Intel will be fiercely competing to deliver the most powerful chip computationally with the least electric power consumed. TSMC's latest effort shows that it can crank up core speeds, but does it have the goods power-efficiency wise? That remains to be seen.
ARM at least has one trick up its sleeve -- the upcoming
ARM Cortex-A15 architecture
This article is over a month old, voting and posting comments is disabled
5/3/2012 5:44:36 PM
I didn't see any mention of power usage. If a "high end" ARM can match (or just in the same ballpark) the low-end of x86 (like, single-core Celerons or something) but still use significantly less power, I'd consider that interesting. But if they're sucking up as much juice as low-end x86, nah.
5/3/2012 6:17:29 PM
I think that is intentional. ARM is not really any power efficient than x86. Decoder takes about 2% of processor power in higher end desktops, and ARM may be better by ~30% in the decoder part. That's about 0.6% better.
I am glad that Jason Mick finally stopped using ARM's "power sipping" and x86 "power hungry" ISA comparisons. I guess medfield proved the point I have been making for a long time on these forums.
Believe it or not, there is more to computer architecture than clock speeds and core counts. That's the reason why all x86 cores dont have same performance (Even with similar cache sizes, core counts, frequencies, process technology). AMD Vs Intel proves that point. That's why it is a separate engineering field. Jason, are you reading this?
And no, one can not just say, its simply a better processor (They are not naturally occurring items, they are engineered.)
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