(Source: Peter Jackson/New Line Cinema)
HP plans to produce 256-core 3D photonic-enabled chip by 2017 on a 16 nm process

Currently silicon die processing units (xPUs) are in a very mature state.  Advanced central processing unit (CPU) core designs like ARM Cortex-A15 and Ivy Bridge, along with graphics processing unit (GPU) counterparts such as Fermi and Graphics Core Next offer Teraflops of computational power to a desktop -- or even laptop -- user.

I. Corona Burns With Desire for Exascale Computing

But much as mobile computing today is being held back by slow progress in terms of batteries (energy storage), the incredible computing power inside everything from laptops to supercomputers is being held back by the sluggish speed of data transfers, both between cores, and between the CPU and off-die devices like GPUs or DRAM.

That sluggish transfer is predicated on electric interconnects, and its cure is photonic (light-based) interconnects.  But perfecting the design and manufacturing of tiny lasers and optical channels printed directly on-die is no easy task.

Hewlett Packard Comp.'s (HPQ) research wing, HP Labs, revealed information this week on its "Corona" photonic computing push, which aims to produce a 256-core chip with on-die photonic data links between the cores by 2017.

Corona prototype
A prototype of HP Lab's Corona photonic computing project is shown here in action, guiding a laser. [Image Source: HP Labs]

HP Labs is a highly respected name in the industry, and was the first lab to produce working memristors, a new kind of fundamental circuit element.  HP is on the verge of deploying its first memristor devices next year.

The HP project is focused on building five vital components of an on-die laser-based communications system:
  1. Waveguides (which confine and guide the light)
  2. Light sources (which produce the light)
  3. Modulators (which control the light source to produce a signal in the light)
  4. Switchable interconnects between waveguides (control flow of light)
  5. Light receivers (which offer built in reception and decoding of signals)
The company's white paper [PDF] on Corona reveals technical details about how it plans to achieve its goals.

II. Building Blocks of a Photonic Supercomputer

The company plans to build 500 nm width wave guides out of standard silicon oxide (SiO2) and crystalline silicon.  

The light sourced used will likely be a modulated continuous-wave laser, which changes the wavelength of the light.  In layman's terms the human eye perceives different wavelengths of light within a select range as "colors", so you can think of this as a "multi-color" laser (although the colors may not be visible to the human eye).  This approach differs from using a pulsing (direct modulated) laser.  Such lasers are certainly feasible, but require exotic semiconductors, making them problematic with tradition complementary metal–oxide–semiconductor (CMOS) manufacturing processes.

The modulator, waveguide switchers, and receivers are built out of looping "rings".  Light is modulated by injecting charge into the rings.  

Corona ring types
Corona uses several types of ring-type photonic micro/nano-structures.
[Image Source: HP Labs] (CLICK image to enlarge)

Likewise, light can be switched between waveguides by changing the resonant characteristics of rings.  A very similar approach is used for the detector, in which a ring exposed to a single waveguide is brought to a specific resonance, which results in a certain wavelength of light being absorbed by a germanium photodetector and all other wavelengths passing through unaltered.

In the sense that it forms three of the most crucial components to HP's optically enable "stack" of interconnected cores, this ring structure is truly "one ring to rule them all."

Corona ring
An electronic microscope image of HP's all-important ring structure. [Image Source: HP Labs]

III. The Race Towards Light Speed Transfers, 3D-Chip Computing

HP Labs researcher Marco Fiorentino told Wired magazine in an interview, that while photonic computing is crucial to faster PCs and exascale supercomputers -- computers 100 times faster than today's top supercomputer -- many chipmakers are going about the design in the wrong way.  He states, "Electronics … cannot scale to the scale that we need for these large systems.  A lot of people have concentrated on individual devices.  Now they’re starting to build circuits. It’s like going from the transistor to the integrated circuit."

By focusing its sights on traditional CMOS-compatible designs only, HP Labs feels its Corona project is more likely to succeed in the near-term.

The optical interconnects will not only allow for faster communications between processors (hence enhancing the overall effective computing speed), but will also cut power consumption (and by proxy on-die heat production).  According to Mr. Fiorentino transferring data at a rate of 10 TBps would currently draw about 160 W. But with on-die photonic lasers his team hopes to cut that total to 6.4 W.

Corona also rides the wave of "3D" chip designs, a field HP is a key pioneer in.  Via using new processes to create through-silicon via (TSV) interconnects, the 256-core Corona core "stacks" can be piled on top of one another in dense configurations.

HP's design uses an optical crossbar connect four cores.  These "stacks" are then TSV connected to one another to form a 64 (likely 4 x 4 x 4) stack, 256-core configuration.   HP Labs hopes to produce the entire stacked chip on a 16 nm process by 2017.

Now, HP is not alone in its quest here.  Since at least 2010, International Business Machines, Inc. (IBM) has been working on a similar project dubbed the intra-chip optical network (ICON).  And then there's the other 3D exascale chip competitors -- Intel Corp.'s (INTC) "Runnemede", NVIDIA Corp.'s (NVDA) "Echelon", "Angstrom" a project at the Massachusetts Institute of Technology's Integrated Systems Group, and Sandia National Laboratories's 3D-chip "X-calibur" project,

Sources: HP Labs [PDF], Wired

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