Intel Shows 22nm 50-Core "Knights Corner" CPU
November 16, 2011 9:54 AM
comment(s) - last by
Rajeeb Hazra, General Manager of Intel's Technical Computing Group holding “Knights Corner”
Over 1 TeraFLOPS on a single chip
GPGPU and cloud computing have been hot topics for the last several years. Intel has shown off several designs like
Single-chip Cloud Compute
r in the past. However, it is
that will be the firm's first commercial product to use the Many Integrated Core (MIC) architecture. The co-processor will be offered as a PCIe add-in board.
The MIC concept is simple: Use architecture specifically designed to process highly parallel workloads, but ensure compatibility with existing x86 programming models and tools.
This would give MIC co-processors the ability to run existing applications without the need to port the code to a new programming environment, theoretically allowing maximum CPU and co-processor performance simultaneously with existing x86 based applications. This would dramatically save time, cost and resources that would otherwise be needed to rewrite them to alternative proprietary languages.
AMD and NVIDIA have been trying to do with their
by enabling support for languages like C++, but Intel wants to challenge them in this potentially lucrative market.
will be manufactured using Intel’s latest 3-D Tri-Gate
P1270 22nm transistor process
and will feature more than 50 cores. Intel demonstrated first silicon of
at the SC11 conference yesterday. The co-processor wowed the crowd by delivering more than 1 TeraFLOPS of double precision floating point performance.
The firm also touted its "commitment to delivering the most efficient and programming-friendly platform for highly parallel applications", and showed off the benefits of the MIC architecture in weather modeling, tomography, protein folding, and advanced materials simulation at its booth.
There is no timeframe on when
will enter production or be available to customers.
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RE: holy hell..
11/16/2011 12:59:30 PM
So Basically TDP can go as high as 300 watts and even more (considering 2 8-pins power for PCI-E) instead of 130W limit on today's CPU slot. This is awesome
RE: holy hell..
11/16/2011 6:20:35 PM
It's similar to what we're seeing in the ARM world. AppliedMicro's X-Gene chips scale up to 128 ARM cores, using up about 2W per core (pretty close to that 300W figure Intel is touting for a 50-core part).
Calxeda is doing similar things in a more distributed manner with an eye on cloud computing; they're doing lots of low-power quad-core ARM chips in super high density servers. Four cores per CPU, four CPUs per board, eighteen boards per chassis, and four chassis per rack. Each CPU has its own RAM, acting as an independent server, meaning a single rack can host 288 quad-core servers. Each server is relatively low-power, but performance-per-watt should still beat out traditional servers on an aggregate level, and most cloud instances don't need super-powerful servers; they're either massively distributed, or simply low-usage. There's a reason why atom-based servers have become popular in the datacenter for dedicated servers.
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