The Underdog: AMD Announces Details on Trio of Upcoming CPU Designs
August 24, 2010 12:00 PM
Bobcat aims for advanced performance at under 1 watt of power consumption per core.
(Source: AMD via Anandtech)
Bulldozer packs a major redesign, with two integer cores sharing an FPU. AMD says the approach optimizes performance per die size.
(Source: AMD via Anandtech)
The Llano packs a K10-derived core (pictured here) paired with on-die DDR3 and a 5000-series GPU.
Can Bulldozer, Bobcat, and Llano allow AMD to dethrone CPU kingpin Intel?
AMD has plenty to cheer about of late. Almost out of the red in its latest
, the company has surged ahead to become the
top seller of discrete GPUs
(as of July). The company also is sitting on a pile of cash -- $1.25B USD -- from a
settlement with Intel
over Intel's alleged attempts to pay cash payouts to OEMs to not use AMD CPUs (and several other alleged anticompetitive actions). With the U.S. Federal Trade Commission promising to
keep a watchful eye on Intel
, the ball is now in AMD's court to deliver a competitive CPU product.
Today at the
conference held at Stanford University, the company discussed some
on its trio of upcoming architectures (Bobcat, Llano, Bulldozer) that AMD hopes will revitalize its CPU unit and offer a turnaround akin to what it pulled off in the GPU sector.
First up is
. Discussed as far back as
, this architecture covers lightweight 1-10 watt TDP processors for mobile computers such as netbooks. In that respect it's AMD's first true challenger to Intel's wildly successful Atom.
AMD has had CPUs
as netbook processors, but they were too power hungry to be true competitors. For example, last year's single core
AMD Athlon 64 L110 CPU
, which debuted in Acer subsidiary Gateway's LT3103u netbook, clocked in at 1.2 GHz and consumed 13 watts of power. Compare that to
Intel's Atom N270
, which launched nearly a
earlier and offered 1.6 GHz speed and a tiny 2.5 W power envelope.
To put things in context AMD is targeting
under 1 watt
per core with
, a dramatic improvement over the L110 and other currently-offered low-power processors from AMD.
While both Atom and
are similar in number of pipe stages for the CPU (16 stages for the former, 15 for the latter), the
is an out-of-order CPU which should give it a performance edge over Intel's otherwise similar design. The design features 64 KB of L1 cache, and 512 KB of L2 cache.
notably will likely never be sold as a stand-alone CPU (or at least AMD has announced no plans to do so). It will first pop up early next year as an AMD's first Fusion CPU dubbed
will feature 2
cores paired with an AMD GPU. The combined system-on-a-chip (SoC) will be produced at the 40 nm node at TSMC's chip fabs.
AMD even has a catchy name for the package -- it's not a
, it's an
(Accelerated Processor Unit).
, the new CPUs target the performance desktop and notebook sector and offer a
, shifting the architecture in an interesting direction.
is a more modular design. AMD is opting for a bit different design on the modular level, though. It's opting for a two-integer core design capable of servicing two threads, with a common floating point unit (FPU) between the cores. While obvious lacking the performance of 2 full cores with a FPU each, the dual-core module design is only 12-percent larger than a single core design at the node size. And AMD promises the performance boost on average will be significantly more than 12-percent, so this seems a smart tradeoff.
Other changes include a deeper pipeline and more aggressive prefetching. Idle cores can be fully turned off for power savings.
CPUs will primarily retail in the desktop sector in 1 to 4 module packages (for a total of 2 to 8 threads/integer cores) on the
. A 16-core
and a C32 socket 8-core model dubbed
will launch for servers. The CPUs will be produced on a 32 nm process, by Global Foundries. Intel was the first to hit this node with its
, which launched in January of this year.
Each integer core has a tiny 16 KB cache. That's disappointingly, low, but AMD says the performance impact will be masked by plentiful L2 cache.
should arrive first in Q2/Q3 2011 in server packages (though no precise 2011 date has been specified yet) and later in the year for desktop packages. This places it roughly two to three quarters behind Intel's first redesigned 32 nm architecture, Sandy Bridge which is slated for a
Q4 2010 launch
. Believe it or not, that means AMD is catching up -- if it can meet its schedule that is.
Last but not least is
. Unlike the redesigned
is a system on a chip featuring a refined K10-based core design -- basically a
tweaked Phenom II
. AMD's slides have shown that it will use a new socket called "AM3r2". The package will pack four of those K10-based cores, a 5000-series-derived GPU, and DD3 memory.
's release date was
from Q4 2010 to Jan. 2011, based on yield issues (and "
reaction to Ontario’s market opportunities
", according to AMD PR-speak).
If AMD can push ahead and keep its launch dates on target it looks to be quite competitive with Intel CPU-wise on a number of fronts in 2011 -- netbooks/tablets (
), mid-range laptops (
), and high-end notebooks/desktops (
). Of course the most telling details will be the actual benchmarks of the chips versus Intel's competitive designs. AMD currently has these CPUs in its lab and is doing internal testing -- but don't expect third-party benchmarks until close to launch-time.
"Intel is investing heavily (think gazillions of dollars and bazillions of engineering man hours) in resources to create an Intel host controllers spec in order to speed time to market of the USB 3.0 technology." -- Intel blogger Nick Knupffer
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