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IMFT's 64Gb 25nm NAND flash memory chip

IMFT's 300mm L74 wafer
The most advanced semiconductor process yet

Intel currently has the best selling solid state drive on the market, while Micron has just started shipping the fastest SSD available using the 6Gbps SATA interface. The secret weapon of the two companies is IM Flash Technologies, their joint venture that produces cutting edge 34nm NAND flash memory. Not only does it ensure a steady supply in turbulent times, but it combines the technology and manufacturing prowess of two tech titans together to combat NAND market leaders Samsung and Toshiba.

“Through our continued investment in IMFT, we’re delivering leadership technology and manufacturing that enables the most cost-effective and reliable NAND memory,” said Tom Rampone, Vice President and General Manager of Intel's NAND Solutions Group.

DailyTech saw some 22nm shuttle test wafers at last year's Intel Developer Forum. The world's largest semiconductor company expects to introduce the new process at the end of next year for its Ivy Bridge CPUs, but needs to do a lot of development work first. One of the best ways to do that is to develop a less advanced intermediary step, and the partnership with IMFT allows them to do just that.

IMFT has developed a new 64Gb (8GB) NAND flash memory chip in a compact 167mm2, doubling the density of its 32Gb chips built on the 34nm process. The company will thus be able to produce twice as much capacity for roughly the same cost at its fab in Lehi, Utah, which is currently producing 34nm flash. Development of the 25nm process (codenamed L74) using 300mm wafers was spearheaded by Micron's Fab 4 in Boise, Idaho.

Frequent readers may recall that IMFT announced its 34nm process in November of 2008, but had problems ramping into mass production until the summer of last year. This was primarily due to difficulties in skipping the 43nm node and going directly to 34nm from 50nm. However, we spoke with Dave Baglee and Rod Morgan, IMFT's Co-executive Officers, who assured us that the ramp has been progressing very smoothly.

Yields are much better than the 34nm during the same timeframe, and write speeds will be similar or greater to today's NAND using the ONFI 2.2 standard. The number of maximum write-cycles will also be coming in closer to today's standard than the 3-bit MLC NAND that other companies are pinning their hopes on. Page and block sizes will double on the new chips, to 8KB and 256 pages respectively.

Production of the new multi-level cell chips will start in the second quarter, with mass production ramping up into the third quarter. The first batches will go into embedded products first, while new SSD models getting the new chips are undergoing verification and testing. Intel isn't promising any significant price reductions, but will instead tailor its pricing to meet market demand.

Intel, Micron, and its customers are expected to introduce new SSDs in the latter half of this year using the new technology. Although the company won’t officially confirm any details, Intel is expected to release larger capacities using a newer, faster NAND flash controller.

“To lead the entire semiconductor industry with the most advanced process technology is a phenomenal feat for Intel and Micron, and we look forward to further pushing the scaling limits,” said Brian Shirley, Vice President of Micron’s memory group. “This production technology will enable significant benefits to our customers through higher density media solutions.”

“This will help speed the adoption of solid-state drive solutions for computing,” added Rampone.

IMFT also sees a clear path to NAND flash development below 20nm, despite forecasts of scaling hitting a wall. IMFT is making extensive use of techniques like double mask patterning and immersion lithography, and may end up using EUV lithography in the future.



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RE: non-volatile memory long term
By Fritzr on 2/2/2010 5:28:32 PM , Rating: 2
Assuming your erase program verifies the contents of the actual memory chips, a simple overwrite is sufficient. The data is stored as a local electric charge. Unlike magnetic storage there is no memory effect where you can read the residual magnetization of the area where a bit was stored.

A flipped bit in a memory chip leaves no trace of what the previous state was. You just have to make sure to write a value to every bit that stored the data being erased.


By mindless1 on 2/2/2010 7:55:44 PM , Rating: 2
I am too lazy to go hunt down proof at the moment, but you are incorrect, there is a residual charge in memory that technically (though in most cases not practically) can be detected.


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