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Could later versions replace datacenters?

Intel has repeatedly stated that it believes the future of computing lies in many-core CPUs. The company will be releasing its six-core Gulftown chip based on 32nm Westmere technology next year, and it is still working on its Larabee many-core GPU.

Several years ago, Intel showed off its 80-core Teraflops Research Chip. That chip was highly experimental, with only simple floating-point cores. Three years later, Intel has something much more advanced.

Intel calls its new 48-core IA32 processor a "single-chip cloud computer" (SCC) because of the way it resembles cloud datacenters, claiming that it "rethinks many of the approaches used in today's designs". The SCC consists of 24 "tiles", with two IA32 cores and a router per tile creating a mesh network with 256GB/s of bandwidth.

Each tile (2 cores) can run at its own independent frequency, and groupings of four tiles (8 cores) can each run at their own voltage. The SCC can run all 48 cores at one time over a range of 25W to 125W and is capable of selectively varying the voltage and frequency of the mesh network as well. The SCC also features four integrated memory controllers capable of addressing 64GB of DDR3 DRAM, and was built on Intel's current 45nm high-K metal gate process.

Cloud datacenters currently run most of the internet, and can use tens of thousands of computers connected by a physically cabled network. They are capable of distributing large datasets and working them in parallel. The SCC uses a similar approach, with all the parts integrated on a single 567mm2 chip, which is approximately the size of a postage stamp.

"With a chip like this, you could imagine a cloud datacenter of the future which will be an order of magnitude more energy efficient than what exists today, saving significant resources on space and power costs," said Justin Rattner, the head of Intel Labs and Intel's Chief Technology Officer. "Over time, I expect these advanced concepts to find their way into mainstream devices, just as advanced automotive technology such as electronic engine control, air bags and anti-lock braking eventually found their way into all cars".

Although the hardware is impressive, it is the software that will determine how well the SCC works. Creating software with just a couple of threads is difficult enough, but applications written for the SCC will have new capabilities like dynamically managing which cores are used for a given task at a given time. Related tasks can be executed on adjacent or nearby cores, and the SCC is capable of passing results from one core directly to the next in an assembly line. Voltage and clock speed can also be individually controlled through software. Intel says that parallel programming approaches used in cloud datacenter software have been applied when designing the SCC.

Researchers from Intel, HP, Yahoo, and several research institutions have been working on an open cloud-computing research testbed project named Open Cirrus, which has begun porting cloud applications to the SCC using Hadoop, a Java software framework which supports data-intensive, distributed applications.

Intel says that the long-term research goal is to "add incredible scaling features to future computers that spur entirely new software applications and human-machine interfaces". The company plans to work with several dozen industry and academic  research partners around the world next year by manufacturing and sharing 100 or more SCC chips for hands-on research in developing new software applications and programming models for future many-core processors.

"Microsoft is partnering with Intel to explore new hardware and software architectures supporting next-generation client plus cloud applications," said Dan Reed, Microsoft's Corporate Vice President of Extreme Computing.

"Our early research with the single chip cloud computer prototype has already identified many opportunities in intelligent resource management, system software design, programming models and tools, and future application scenarios."

The SCC was co-created by researchers working at Intel Labs locations in Bangalore (India), Braunschweig (Germany) and Hillsboro, Oregon research centers. More details on the chip's architecture are scheduled to be published in a paper at the International Solid State Circuits Conference in February.

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By phaxmohdem on 12/3/2009 12:29:07 PM , Rating: -1
Made up of 24 "tiles" ehh? Where have I heard talk like that before... *cough* *cough* Slap some x86 instructions on it and call it your own. Nice. :)

RE: Tilera?
By theapparition on 12/3/2009 12:35:07 PM , Rating: 5
To be fair, Intel has previewed massivly multi-cored products for many years. To claim that they "stole" something as your post implies is misleading. I'm sure all developement was done in house.

However, I wouldn't want't to be an investor in Tilera after this announcement.

RE: Tilera?
By phaxmohdem on 12/3/2009 12:43:00 PM , Rating: 1
To be even fairer, I don't think Tilera is competing with Intel with this product anyway. They seem to be after the embedded market, not commodity servers/workstations.

I just couldn't help but notice the stunning similarity in how Intel is touting this architecture... from tiles, to internal networks with routers between tiles... it is darn near plagiarism from older Tilera Press releases and demos and product literature I've seen.

RE: Tilera?
By ogreslayer on 12/3/2009 3:50:42 PM , Rating: 3
I would assume that Intel released this chip's info to thumb a nose at Tilera. Its been awhile since Intel showed that 80-core part, and that wasn't very complex. Breaking out a more complex high-core chip makes sense to kinda say 'Yes, we can do it too now shut it'.

The Terascale chip had routers on it; which was mostly the point of the design. I don't know if they updated the page, but it also refers to tiles for that unit as well.

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