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New error correction and integrated DDR3 memory controllers are coming for some of Intel's most expensive products

Intel launched its Xeon 5500 series of server CPUs using Nehalem architecture at the end of March. Using lessons learned from the Core i7, the world's largest semiconductor manufacturer managed to achieve impressive performance gains while cutting power consumption dramatically. Sales have been impressive, and the company expects that it will account for 50% of all dual socket (2S) server sales by August.

DailyTech previously showed part of Intel's server roadmap, detailing a follow-up Xeon processor series known as Nehalem-EX. Intel is now releasing details about Nehalem-EX in order for its customers to include it in their planning.

Each Nehalem-EX processor will feature up to eight cores on a single chip, up to 24MB of shared cache, and support 16 threads with Hyper-Threading. The chip is built using Intel's P1266 45nm High-K metal gate technology, and will be comprised of 2.3 billion transistors. It will use the new Boxboro-EX chipset, and be able to support up to 16 DIMMs per socket. Eight socket systems capable of processing 128 threads simultaneously will be possible, since each chip will feature four Quick Path Interconnects.

Intel is also moving away from Fully-Buffered DIMMs to DDR3 Registered ECC DIMMs. It will use its Scalable Memory Interconnect, which has its own internal memory buffers. A new feature known as Machine Check Architecture (MCA) recovery will detect CPU, memory, and I/O errors. It is designed to work with operating systems to correct and recover from otherwise fatal system errors, thus maintaining critical uptime. Microsoft, RedHat, Novell, and VMware are already promising support in their products.

Multi-socket capable Xeon processors are typically used in large corporations, universities, and research institutions. Often, it is used to create supercomputers for High Performance Computing (HPC) applications, such as modeling the decay of nuclear waste, simulating tectonic stresses to predict earthquakes, and examining protein folding. Uptime and reliability is critical, as any errors will mean that the modeling run will have to be restarted. HPC servers are in high demand, with computer time booked months in advance.

Intel's previous champion was the Xeon 7400 series, formerly known as Dunnington. It uses DDR2 memory running at the same 1066MHz as its Front Side Bus. Compared against the Xeon 7400, Nehalem should have 9 times the memory bandwidth. Intel is also claiming 2.5 times greater database performance, 1.7 times integer throughput, and 2.2 times floating point throughput.

Nehalem-EX is codenamed Beckton within Intel, which will only say that it is scheduled for released in the second half of the year. The firm may choose to launch Beckton at the Intel Developer Forum at the end of September, with sales at the beginning of the fourth quarter as the Xeon 7500 series.

"Well, we didn't have anyone in line that got shot waiting for our system." -- Nintendo of America Vice President Perrin Kaplan

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