Print 33 comment(s) - last by MrPoletski.. on Apr 21 at 9:52 AM

28nm technology promises 40% more performance than 45nm tech

The IBM Technology Alliance -- including IBM, Chartered Semiconductor Manufacturing Ltd., GLOBALFOUNDRIES, Infineon Technologies, Samsung Electronics, Co., Ltd., and STMicroelectronics -- have announced that they have jointly defined and are developing a 28nm, high-K metal gate (HKMG), low power CMOS process technology.

IBM reports that the 28nm technology can provide power-performance and time-to-market advantages for makers of a variety of power-sensitive and consumer electronics devices like MIDs and smartphones. The new technology creates improved leakage characteristics that will optimize battery life for next-gen mobile devices.

The alliance has outlined a migration path from the current 32nm process that is being used to the new 28nm technology that requires no costly and time-consuming redesign of the components according to IBM.

IBM's Gary Patton said in a statement, "Through this collaboration, IBM and its alliance partners are helping to accelerate development of next-generation technology to achieve high-performance, energy-efficient chips at the 28nm process level, maintaining our focus on technology leadership for our clients and partners."

IBM says that early work with some clients has shown that the 28nm technology can provide a 40% performance improvement while saving up to 20% in power compared to 45nm technology devices. The HKMG implementation also makes for one of the industry's smallest SRAM cells reports IBM at only 0.120 square microns.

ST-Ericsson's Jorgen Lantto said, "This statement of commitment to 28nm low-power technology by the IBM Joint Development Alliance is an important progression from 32nm high-k metal gate technology. Leaders in the mobile industry can utilize 28nm low-power technology to meet the increasingly aggressive demands for performance and improved battery life."

IBM recently walked away from purchase talks with Sun after Sun's board balked at IBM offer.

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RE: AMD, Intel, and IBM
By MrPoletski on 4/21/2009 9:52:15 AM , Rating: 1
You're really lucky I'll even dignify your uninformed remarks with a response, but I will.

um, pot, kettle?

The Alpha was not an architecture, it was an instruction set,

Again, it is the name of a FAMILY of processors, get it right.

and what made it fast, when it was, was that DEC's implementations were extremely expensive.

It was fast because it was expensive?

Does that mean macs are faster than PC's?


There was nothing special about the instruction set, and many times during the lifetime of it, POWER was faster.

still beat the crap out of any equivelant Intel processor. Being as you keep forgetting how much more expensive the P4 was vs the K8 for the same performance I am assuming price is irrelevant.

Initially, it was a very high clock speed processor, whereas the POWER was IPC, but even that changed over time. Anyway, I was asking based on what was he saying the K7 was brilliant. In reality, it had nothing brilliant and was a prosaic design.

It was based on the alpha design, a design which Intel later bought to avoid patent infringment lawsuits from DEC.

Your remarks about processors coming out and not have good performance initially is absurd and ignorant. It didn't even make sense with respect to the Athlon, which initially did have a performance edge of the Pentium III. The Conroe raped the Pentium 4 and K8, and the i7 beats the Penryn, but you stupidly compared the low end with the high end. The fact remains, the high end i7 easily beats the high end Penryn. And it's very closely based on it.

*shakes head*

The Coppermine was based on the Pentium Pro, which was released in 1995. The Pentium II made some minor internal changes, mostly to run 16-bit software, since segmentation is rarely used in 32-bit software (well, technically, it is, but they use a 32-bit segment so it's irrelevant). The Pentium III was a Pentium II with SSE, nothing more. The Coppermine was a Pentium III with a different L2 cache arrangement, being on die instead of going through the "back-side bus".

Yes... I know this, did I say otherwise?

The 1.13 Pentium IIIs they pulled from the market were Coppermines, not Tualatins. They later found out it had problems with the L2 cache at that clock speed. The Tualatins could overclock easily to 1.6 GHz, but Intel priced them very high and keep the memory bus speed limited to 133 MHz.

Server chips for the enterprise market usually do have a much higher markup, would you put a xeon in your home desktop?

Nehalem is not a brand new architecture, it's very similar to the Penryn internally.

Intel disagrees. Even if it might be similar to the penryn internally, that does not make it the same bloody chip with an IMC bolted on the front.

The changes are mainly with the cache and memory architecture, and sometimes not even for the better (for example, the L1 cache is slower).

Yeah, Intel deliberately slowed the cache speed down for the fun of it..... or perhaps there was a damn good reason for Intel to reduce ONE factor of cache performance in order to increase another factor of cache performance huh?

You really need to do some reading before say things like this, it's very uninformed, especially since Intel doesn't even know it's a new architecture. Nor does AMD know the Phenom II is brand new. They thought the Bulldozer was going to be the new one. Maybe you should tell them so they don't do something really stupid. They need to know!

Funny that, they are the ones that told ME in their press releases, the white papers and the interviews etc.

The K8 was not even close to the first processor to move the memory controller to the processor.

No fucking shit, I thought the P9 was the first processor to add two numbers together.


happy now?

Intel didn't do it not because it was so difficult, but because it made no sense to.

Were you not just criticising AMD for not implimenting a feature that Intel implimented years before?

The Pentium 4 was too big, and the Conroe was better served with larger cache memory. With 45nm, it finally made sense.

Oh really? because apparantly (according to you) an i7 is a penryn with a different cache structure and an IMC. so surely the penryn DID benefit from an IMC?

If you think the K8 was the first, look at the NexGen 586 processor, which came out in the mid-90s. There was nothing new about it. That doesn't make it a mistake, but it doesn't make it an innovation either.

The nexgen 586 did not have an IMC, it didn't even have an integrated x87 unit. The company was bought up by AMD, by the way.

The Pentium III was limited by it's bandwidth tremendously, and that made RDRAM ill suited for it.

odd you should say that because the problem with RDRAM was not it's bandwith. RDRAM, in fact, had a higher theoretical bandwith than the DDR available at the time.

Perhaps you meant latency.

The 840 chipset for the Pentium III was better though, having lower latency. But the Pentium III was just stuck with a single pumped bus, unlike the Athlon which was doubled, and the Pentium 4 which was quad-pumped. Both had much higher bandwidth and that crippled the Pentium IIIs performance.

AH, so now you mean FSB bandwidth right? not memory bandwith. Well perhaps if Intel had moved along the same lines as AMD and adopted an IMC THEN and used a QPI style bus...

RDRAM was very effective with the Pentium 4, by the way, because the Pentium 4 could take advantage of its bandwidth.

The P4 wasted a lot of it's bandwith with overheads. The latency of the RDRAM sucked balls though, something an IMC would go a long way to curing.

The Pentium III could not, and had the same problem with DDR, although DDR did not have the latency issues of RDRAM.

No it did not. Intel have always been bloody good at their memory/cache heirachy though. Eventually the later conroes had very comparable latencies to system ram to the IMC athlon xps.

"Spreading the rumors, it's very easy because the people who write about Apple want that story, and you can claim its credible because you spoke to someone at Apple." -- Investment guru Jim Cramer
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