Samsung, Toshiba, and SanDisk are preparing 32nm production of new Multi-Level Cell NAND flash chips that will be faster, smaller, and cheaper than those currently on the market. This is expected to further drive down the cost of Solid State Drives.
Intel and Micron have been producing 32Gb MLC chips in their 34nm Utah joint venture facility since November, giving them a major cost advantage. Most of that production has been directed towards the space sensitive mobile phone market, as Intel's SSDs use NAND flash produced on 50nm lines.
Samsung will soon counter that threat by beginning production of 64Gb MLC chips on 32nm production lines in the third quarter. It will also use its new Self-aligned Double Patterning Technology (SaDPT), along with Charge Trap Flash (CTF) using silicon nitride and a new structural configuration. It expects all of these advancements together will allow it to lower costs beyond those of its competitors. Samsung is the world's largest producer of NAND flash memory.
SanDisk and longtime NAND flash partner Toshiba have begun preparations to switch Toshiba's Yokkaichi plant from 43nm manufacturing to their own 32nm process. They will begin production in the third quarter of double-bit and triple-bit MLC devices at 32 Gb densities. The X3 MLC chip has a very small 113 mm2 die size, which will enable more chips to fit in SSDs and enable terabyte capacities.
Recently, Toshiba and SanDisk demonstrated a new type of NAND cell capable of holding four bits per cell, for production on 43nm lines. SanDisk has committed to Q2 production of its new X4 memory chip, which it combines with a new X4 controller chip in a multi-chip package (MCP). It hopes to provide a "completely integrated and low-cost storage solution" for SSD production.
Most of Toshiba's NAND flash production is currently on the 43nm process, which they will use for their own line of SSD drives launching in Q2. They have stated that they will put X4 64Gb MLC chips measuring 244.45 mm2 into production, but it has not been confirmed that these will be used in their SSDs.
quote: ... which will enable more chips to fit in SSDs and enable terabyte capacities