New 50nm DDR3 DIMMs from Samsung and Elpida are entering mass production this month. The chips will feature higher densities and speeds while lowering latencies, power consumption, and costs.
Elpida's new 50nm process uses 193nm argon fluoride immersion lithography combined with copper interconnect technology, providing a 25 percent speed boost over standard aluminum interconnects. A standard chip size of less than 40mm2 means that there will be more dies produced per wafer, lowering costs once the line matures and yields are maximized.
The new chips are capable of 2.5Gb/s at a standard 1.5v, but can also be used at 1.2v up to 1.6Gb/s. Initial production will be at 1Gb densities. This enables new usage models in the mobile and server application space.
Corsair's Dominator GT 2GHz CL7 DDR3 DIMMs were shown at CES, and they may enter production this month using Elpida's latest.
Meanwhile, the world's only profitable DRAM producer is not standing still.
Samsung's own 50nm process is being used to manufacture 2Gb DDR3, and is expected to become Samsung's primary DRAM process technology this year. They claim a 60% increase in productivity over their DDR2 equivalents.
Qimonda taped out its 46nm DDR3 Buried Wordline technology in November, ahead of their internal schedule. They hope to start mass production by mid 2009.
Many other DDR3 producers are also looking to lower geometries in preparation for AMD's AM3 socket launch and Intel's Lynnfield launch, both of which will use DDR3 and accelerate market demand.
The price premium of DDR3 could drop from 100% to 10% by the time Lynnfield and Windows 7 launch together in Q3. Intel will be using DDR3 exclusively on its 32nm Westmere CPUs.
Due to a massive glut of DDR2 chips, there are almost no plans to upgrade factories to 50nm for DDR2. Instead, they will transition to surplus 65nm and 70nm equipment currently used for DDR3.
According to International Data Corporation, an IT market research firm, DDR3 sales will account for 29 percent of the total DRAM market by units sold in 2009. This will grow to 72 percent in 2011.
quote: The problem according to the team is the lack of memory bandwidth along with fighting between the cores over the available memory bus of each processor. The team uses a supermarket analogy to better explain the problem. If two clerks check out your purchases, the process goes faster, add four clerks and things are even quicker.
quote: Today's chips aren't bandwidth restricted
quote: The problem according to the team is the lack of memory bandwidth
quote: There's lots of benchies out there showing the lack of impact of faster memory speed on system performance (in anything beyond memory benchmarks, that is).