Intel's CTO Pat Gelsinger proudly displays wafers of Nehalem processors with B1 stepping.  (Source:

Intel is continuing to follow its "tick tock" strategy, with die shrinks coming in 2009 and 2011. New architectures, according to Intel, will be coming in 2008 with Nehalem, in 2010 with Sandy Bridge, and in 2012 with Haswell.  (Source:

Real time raytracing may finally be introduced with Intel's Larrabee. Intel demoed an impresive raytraced version of Quake IV recently.  (Source:
Intel has lots of excitement in store in the next four years

One of the most anticipated releases for late 2008 is Intel's Nehalem processor --its new four core processor that features the return of Hyper Threading, allowing eight logical cores per processor.  Recently formally named Intel Core i7 by Intel, the new processor is also highly anticipated as it will feature QuickPath, Intel's answer to AMD's HyperTransport, and will feature an on-die memory controller for the first time.

The latest Intel slides from CanardPlus show that Intel's wafer production is going smoothly and B1 stepping chips are being produced.  Sources at Intel estimate that the chip will offer 15 to 20 percent performance gains at a common frequency over today's top of the line Penryn processors.  The processor will go head to head with AMD's upcoming 45 nm offering, codenamed Shanghai.

Looking forward, according to internal slides, Intel plans to release a 32 nm shrink of Nehalem, codenamed Westmere at the end of 2009.  This increment follows Intel's "tick tock" approach of yearly updates, with the "tick" being the die shrink such as Westmere, while the "tock" represents a new architecture.

The next new architecture after Nehalem is codenamed Sandy Bridge (formerly known as Gesher) and will be built on a 32 nm process.  While details are scarce, Intel is hard at work on its development and details have begun to trickle out. 

Sandy Bridge will feature many key improvements.  It will support wider vectors, which Intel says allows for more power efficient floating point operations.  It also will feature "advanced data rearrangement", involving the use of 256 bit primitives.  Intel says this will improve cache coordination and help to speed the flow of data.  Furthering Sandy Bridge's monolithic nature, the new architecture will support three and four operand instructions and non destructive syntax to minimize register copies and allow for extensibility.

The architecture also features "flexible unaligned memory access support", which Intel indicates will allow computations to be immediately performed on data loaded from memory.  Also Intel will offer up an extensible new opcode (VEX), which it says will reduce code size.  The net results of the improvements Intel says will be an increase in performance of as much as 90 percent in certain mathematically intensive operations such as matrix multiplies.

With the Sandy Bridge processors expected to land in 2010, 2011 will bring a shrink codenamed Ivy Bridge, which will be made at the 22 nm node.  Finally in 2012, the next new architecture Haswell will arrive.

While Haswell is still in the very formative stages, Intel has big plans for it as well.  Early reports indicate that it will have eight physical cores by default and "revolutionary" power saving features.  Another key feature of this new architecture will be the FMA (Fused Multiply-Add), which will allow terms to be multiplied and added simultaneously.

Intel was rather tight-lipped about architectural details on its upcoming GPU, Larrabee, after so much initial noise.  However, Intel did reveal that its ray-tracing engine may finally see light with the release of Larrabee.  Ray-tracing is a different rendering method that has traditionally been more computationally intensive.  While producing the beautiful CGI in movies, it has eluded the capabilities of modern gaming hardware. 

In a sign of things to come, a ray-traced version of Quake 4, which looked stunning and ran at a silky 90 FPS in 1280x960, was demoed on a dual socket board featuring Intel's top of the line quad cores.

Also detailed in brief was the possible Atom-successor -- the upcoming Tolapai processor (formerly codenamed Pineview).  Tolapai is a SOC (System On a Chip) in that it will feature an integrated DDR2 memory controller, an integrated graphics core, and a full chipset, which features PCI, Ethernet, serial, and peripheral connections. 

The chip's processor will be an x86 design based on the Pentium M and will feature 148 million transistors.  It will come in a 37.5mm x 37.5mm package.  It will launch with 600 MHz, 1066 MHz or 1200 MHz clocked models.  The new integrated system is expected to be used in Netbooks as well as other diverse applications and will compete with ARM Holdings' SOC offerings.

With several new products launching this year and next, Intel is certainly looking to continue its commercial successes.

"Vista runs on Atom ... It's just no one uses it". -- Intel CEO Paul Otellini

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