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Larry Seiler and Stephen Junkins Speak at Intel Larrabee Brief  (Source: News.com)
Intel will begin sampling Larrabee in 2008 with products on market in 2009 or 2010

Today there are three main players in the graphics market producing hardware -- Intel, AMD, and NVIDIA. As the market stands right now, only AMD and NVIDIA manufacture discrete graphics cards with Intel sticking exclusively to on-board graphics that are common on the vast majority of notebook and desktop computers in the low and mid-range market.

Intel is looking to change that and will be bringing its own discrete products to market at some point. The discrete graphics cards from Intel will use the Larrabee architecture and according to eWeek; discrete graphics cards using the Larrabee architecture won’t be available until 2009 or 2010. EWeek does say that Intel will be sampling Larrabee in 2008.

Intel has begun talking about the Larrabee architecture and naturally, it feels that Larrabee is the best architecture out there. What makes Intel so enthused by its architecture is that the Larrabee core is based on the Pentium CPU and uses x86 cores. The use of x86 cores means that programmers and game developers can use the familiar programming languages -- like C and C++ -- that have been in use for a number of years, rather than having to learn a new programming language like NVIDIA's CUDA.

Intel says that its Larrabee is a many-core processor and eWeek reports that it will likely containing ten or more individual x86 processor cores inside the silicon package. Discrete graphics cards using the Larrabee architecture will initially be aimed at the gaming market. That means Intel is directly targeting AMD and NVIDIA with Larrabee.

Intel says Larrabee will support both DirectX and OpenGL APIs and it is encouraging developers to design new and graphic intense applications for the architecture. Larrabee will also bring a new era in parallel computing with developers being able to write applications for it using C and C++ programming languages.

Intel has combined the throughput of a CPU with the parallel programming ability of a GPU. Intel says that Larrabee will also contain vector-processing units to enhance the performance of graphics and video applications. The x86 cores feature short instructional pipelines and can support four execution threads with each core. Each core can also support a register set to help with memory. The short instructional pipeline allows faster access to L1 cache with each core.

Intel says that all cores on Larrabee will share access to a large L2 cache partitioned for each of the cores. The arrangement of the Larrabee architecture allows it to maintain an efficient in-order pipeline, yet allows the processor some benefits of an out-of-order processor to help with parallel applications. Communication between all of the Larrabee cores will be enhanced by using what Intel calls a bidirectional ring network.

Larry Seiler from Intel says, "What the graphics and general data parallel application market needs is an architecture that provides the full programming abilities of a CPU, the full capabilities of a CPU together with the parallelism that is inherent in graphics processors. Larrabee provides [that] and it's a practical solution to the limitations of current graphics processors."

According to News.com, one Intel slide shows that the performance of the Larrabee architecture scales linearly with four cores offering twice the performance of two cores. According to News.com core counts for Larrabee will range from 8 to 48 -- the exact core count for the Larrabee architecture is unknown at this time.



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Die Size
By Spectator on 8/4/2008 1:40:23 PM , Rating: 2
From what i have read today it all looks good. Except 1 detail.

TSMC are about to take the advantage in 43 and 40 production fabs. That is the first time intel has been beaten to a smaller footprint in recent memory.

as competition dont need to invest in fabs they will have the lead perhaps.

on the plus side. intel is making 2.5k atoms per wafer atm. and that market may bring some additional revenue.
but regardless. it all looks good for intel. the atom has been designed to be afficient/profitable. and the atom design team are said to be working on the Larabee.

If i had to invest my cash atm. id go with intel.
For the upcomming cpu that looks like +20% speed increase just from the integrated memory controller ignoring Fab changes.... then wait six months and see what state the vid market is in V intels Fab facilities.

Quote "Strength makes all other values possible". :) :P

Amd/Ati team up to do both.. Nvid ownes/owned most of GPU. Intel Rock up to play them both. lol; Before long we could have nvid+amd+ati as one entity to challenge the Intel Supremacy




RE: Die Size
By voodooboy on 8/4/2008 2:23:17 PM , Rating: 2
quote:
on the plus side. intel is making 2.5k atoms per wafer atm. and that market may bring some additional revenue. but regardless. it all looks good for intel. the atom has been designed to be afficient/profitable. and the atom design team are said to be working on the Larabee.


Revenue...probably. Profits? Not so much. Low-cost chips such as the Atom are actually eating into margins. That's the reason why Paul Otellini (sp?) went on record playing down the Atom and AMD has decided to take the wait-and-watch approach to the whole thing for now; which actually seems like a wise decision. The Atom, for sure, is eating into Celeron/Pentium's share...and that's definitely not good for Intel.


RE: Die Size
By Adonlude on 8/5/2008 4:33:06 PM , Rating: 2
quote:
The Atom, for sure, is eating into Celeron/Pentium's share...and that's definitely not good for Intel.

Actually, the Atom is eating into the entire desktop CPU market and that hurts everybody including AMD. It probably hurts Intel a little less since they do get a money for Atom processors.


RE: Die Size
By masher2 (blog) on 8/4/2008 2:26:00 PM , Rating: 3
> "TSMC are about to take the advantage in 43 and 40 production fabs. That is the first time intel has been beaten to a smaller footprint in recent memory."

Intel unveiled 32 nm flash chips several months ago. They typically lead with flash, and allow the process to mature slightly before moving their CPUs to it.


RE: Die Size
By Meph3961 on 8/4/2008 4:06:43 PM , Rating: 2
quote:
Intel unveiled 32 nm flash chips several months ago. They typically lead with flash, and allow the process to mature slightly before moving their CPUs to it.


While you are correct in saying that Intel unveiled a 32nm flash wafer already (they did back in September 2007). Spectator is partially correct in saying that Intel will lose its process lead. AMD is planning on releasing a 40nm GPU in the 1Q of 2009 and will most likely beat Intel's 32nm CPU to the market making it the smallest process chip out for a little while.


RE: Die Size
By masher2 (blog) on 8/4/2008 4:15:09 PM , Rating: 3
If you're talking about chips in general, then no...Intel will be in volume production of 32nm memory before then. If you're talking cpus/gpus, then its a possibility...though given AMD's track record on meeting the announced timetable on past shrinks, its still possible that Westmere (Intel's 32nm CPU) will arrive before AMD's RV870.


RE: Die Size
By ChipDude on 8/4/2008 5:45:28 PM , Rating: 2
Logic and memory development are very seperate at INTEL. Leading in one isn't at all related to when and how fast the other migrates.


RE: Die Size
By Khato on 8/4/2008 6:14:58 PM , Rating: 3
quote:
TSMC are about to take the advantage in 43 and 40 production fabs. That is the first time intel has been beaten to a smaller footprint in recent memory.


40nm is a half-node, and TSMC typically 'beats' Intel for a short period of time due to them. For size concerns, the TSMC 45nm may well be better than Intel's - their reported SRAM sizes are smaller at least. But, that's because TSMC is already using immersion lithography, which markedly increases costs. As well, the Intel process has far better performance characteristics due to the use of a hafnium based gate dielectric compared to TSMC's usage of nitrided oxides.


RE: Die Size
By vignyan on 8/5/2008 1:29:30 PM , Rating: 2
Hmm i dont know about others... but the terminology for nm node is different b/w processors and GPUs. At intel, it seems that the 65nm process will have all the analog logic uses 65nm libs but the core logic uses 45nm libs. The core libs are different than the analog libs...

The GPU shrink for 55nm was when the logic was b/w 45nm and 65nm... and hence the 55nm node definition by them.. Since 40nm is up, they should be having libs b/w 32nm and 48nm! ;)


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