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  (Source: AMD)
AMD's 12-core and 8-core processors get a new home in 2010

AMD's newest roadmap reveals a major shift in early 2010: the company will once again overhaul its socket architecture to make way for DDR3 support. 

The new socket, dubbed G34, will also ship with two new second-generation 45nm processors. The first of these processors, 8-core Sao Paolo, is described as a "twin native-quadcore Shanghai processor" by one AMD engineer.  Shanghai, expected to ship late this year, is AMD's first 45nm shrink of the ill-fated Barcelona processor. 

This past April, AMD guidance hinted at a 12-core behemoth of a processor.  This CPU is now named Magny-Cours after the French town made famous by its Formula One French Grand Prix circuit. 

Both of these new processors will feature four HyperTransport 3 interconnects, 12MB of L3 cache and 512KB L2 cache per core.

Intel's next-generation Nehalem chip, scheduled for launch late this year but already well leaked, is the first to feature tri-channel DDR3 memory support.  AMD will up the ante in 2010, with registered and unregistered quad-channel DDR3 support.  Current roadmaps claim standard support will include speeds from 800 to 1600 MHz.

AMD insiders would reveal very little about the G34 socket, other than its a derivative of the highly secretive G3 socket that was to replace Socket F (1207). As far as company documentation goes, G3 ceased to exist in March 2008, and has been replaced with the G34 program instead.  The first of these sockets will be available for developers in early 2009.

We counted 1974 pin connects on the leaked G34 diagram -- 767 more pins than AMD's current LGA1207 socket.  Given the additional interconnect pathways for DDR3 and the HyperTransport buses, a significant increase in the number of pins was to be expected.

The addition of a fourth HyperTransport link may prove to be one of the most interesting features of the Sao Paulo and Magny-Cours processors. In a full four-socket configuration, each physical processor will dedicate a HyperTransport link to each of the other sockets. This leaves one additional HyperTransport lane per processor, which AMD documentation claims will finally be used for its long-discussed Torrenza program.

The hype behind Torrenza largely disappeared after AMD's Barcelona launch sour, though the company has hinted before that Torrenza will make a perfect interconnect to GPUs or IBM Cell processors.  This is exactly the type of setup roadmapped for the fastest public supercomputer in the world, IBM's Roadrunner.

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AMD should learn from ATI
By Nyamekye on 7/16/2008 7:45:16 PM , Rating: -1
I wonder if AMD will adopt the same architectural road map as ATI. They keep changing the names of their new processors and giving them odd code names with no actual meaning.

It would be nice if there were just 7 options always. Such as a x450, x470, x650, x670, x850, x870, and x870x2 - and of course, with good prices too.

RE: AMD should learn from ATI
By HaZaRd2K6 on 7/16/2008 7:55:54 PM , Rating: 4
giving them odd code names with no actual meaning.

Right. 'Cause Conroe, Yorkfield, Wolfdale and Nehalem mean so much...

Codenames mean nothing. Just like Intel's newest processors are called the Q9xx0, E7x00 and E8x00 while their codenames are Wolfdale and Yorkfield respectively, and they all fall under the Penryn family name. AMD is no different. Their newest are codenamed Barcelona yet are called Phenom X4.

RE: AMD should learn from ATI
By Noya on 7/17/2008 12:11:24 AM , Rating: 3
Right. 'Cause Conroe, Yorkfield, Wolfdale and Nehalem mean so much...

Actually, the majority of their CPU's and chipsets are codenamed after regions/landmarks close to their fab sites. For instance Nehalem is for the Nehalem River in Oregon.

RE: AMD should learn from ATI
By masouth on 7/17/2008 5:49:49 AM , Rating: 2
I hate to be honest, I didn't even bother with the Wiki link but I thought that the names were created from where they were DESIGNED, not where the fab plants are.

Hence the Merom (first notebook Core 2 Duo) which is named after some place in Israel.

RE: AMD should learn from ATI
By kjboughton on 7/16/2008 9:08:28 PM , Rating: 3
Yeah, because code names that hinted as to what they actually represented would make a lot of sense. The operative word here being "code."

RE: AMD should learn from ATI
By thartist on 7/16/2008 9:36:00 PM , Rating: 2
Then i wonder why you have to think of something as stupidly inflated as 7, with baby steps in performance difference. Because the have us used to it?

Make em' according to prices $100; 99, 199, 299, and big brother X2 for 449, a million or whatever big number. Then the prices would lower as they want. That should be it.

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