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MIT's new nanoruler lithography machine. A 300mm silicon waits to be etched by the scanning-beam interference lithography system.  (Source: Ralf Heilmann, Massachusetts Institute of Technology)
They scaled down, down, down and the transistors went higher.

Lithography is the backbone of every computer chip manufacturer on the planet. Etching tiny lines into silicon wafers to create working circuits brings us our high speed computers and electronic devices. Presently, the industry is floating around the 45nm to 65nm detail mark with 32nm looming closely on the horizon.

What does this mean? The closer together these circuits can be cut, the more features, in most cases transistors, that can be packed onto the same surface area of a single chip. Modern processors are cramming two, four, and even eight processing cores into the space of what a single core consumed just a few years ago.

Part of the growing concern of the semiconductor industry is that further shrinking the lithography process is becoming quite difficult. DailyTech reported on various technologies that promise to take integrated circuits to the next level, but thus far none are being utilized for various reasons.

Engineers at the Massachusetts Institute of Technology have come up with a technique that could advance standard lithography processes, rather than reinventing them. Known as scanning-beam interference lithography, the process currently allows them create 25nm features separated by 25nm gaps – less than half the size of the current 65nm process. Not only can SBIL create smaller features, it can do so over a larger area than typical interference lithography, producing more cut surface more quickly.

The entire process was built from the ground up by MIT graduate students and members of the MIT Kavli Institute of Astrophysics and Space Research. Graduate student Yong Zhao developed a new image reversal process while Chih-Hao Chang, another graduate student, developed a high-precision phase detection algorithm. Combined with electronically controlled 100 MHz sound waves, which control the diffraction and frequency-shift of the etching laser, these MIT inventions allow rapid and precise patterning over large surface areas.

The bar is not yet set on the low limit of what can be accomplished by standard interference lithography. MIT's new invention could help advance the entire industry due to its foundation in widely used lithography techniques. There is still a long way to go before the IC industry needs to worry about building quantum circuitry, and that road is paved by the ever-shrinking die and multiplying core numbers.

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Not as great as it sounds
By glitchc on 7/11/2008 9:41:25 AM , Rating: 2
Being able to cut feature sizes that small is great, but it is only one part of the solution. One of the major problems Intel faced at 45nm were tunneling effects occurring in regular semiconductor substrate. Developing new materials with higher dielectric constants is essential to be able to utilize such feature sizes.

RE: Not as great as it sounds
By Believer on 7/11/2008 10:23:41 AM , Rating: 2
Aye, but Intel have had their new hafnium dioxide "high-k" metal gate dielectrics only since 45nm (as a result of the problems you mentioned). So I would think they can keep up with the pace of the shrinking dies for a while longer at least.

If not, there's always zirconium dioxide (ZrO2) or titanium dioxide (TiO2) and other materials to use instead, with even higher dielectric constants.

RE: Not as great as it sounds
By PandaBear on 7/11/2008 1:17:16 PM , Rating: 2
The all new Intel Core Oct processor with Titanium Dioxide, a high tech with self cleaning technology.

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