While AMD may be having problems tackling Intel in the high-end desktop and
notebook markets, the company is looking to go toe-to-toe with Intel in the
emerging Mobile Internet Device (MID) and netbooks/nettop
market. Intel is currently having a lot of success with its Atom processor
which will be in short
supply until the end of Q3 2008.
AMD is countering with a low-power AMD64-based CPU design of its own
according to leaked slides
obtained by Eee PC News. The unnamed processor features an integrated
memory controller, 16-lane 800MHz HyperTransport link, 256KB of L2 cache, and a
1GHz core clock.
Considering that this new chip is to be used in low-power applications,
power consumption is a critical talking point. Intel's Atom N270 -- the most
popular Atom variant for netbooks -- features a 2.5W TDP at 1.6GHz. However, we
can't forget the i945GSE Northbridge which adds another 4W -- more than the
Atom processor itself.
AMD’s new processor, however, has an 8W TDP for the processor with its
integrated Northbridge/memory controller at 1.0GHz. Although performance
figures obviously aren't available at this time, it would be interesting to see
how AMD's 1.0GHz processor would do against Intel's in-order 1.6GHz Atom N270.
Intel and AMD have both been in the news in recent weeks -- mostly for
squabbles between the two companies. Intel recently got slapped with a $25M
fine for anticompetitive practices in South Korea. Shortly after, the Federal
Trade Commission opened up a formal investigation into allegations of
anticompetitive behavior in the U.S. market.
Finally, AMD and NVIDIA have taken Intel to task over its refusal
to release specifications on its open host controller for USB 3.0. Intel
countered that it would
provide the details once the spec is finished and that the company had
invested “gazillions of dollars and bazillions of engineering man hours” in
developing the open host controller.
quote: Nobody denies my basic point that K7-to-K8 was by far the biggest step in AMD's last 4 microarchs.
quote: Nope. June 2004: first x86-64 Intel CPUs. June 2006: first decent x86-64 implementation. As I said it took them 2 years to get it done correctly.
quote: "The Crossbar (XBAR) doesn't require HT either, that's another dualcore thing.". Wrong. The XBAR was present even in single-core CPUs, like the first Opterons back in April 2003. The purpose of the XBAR is to link the core(s) to the IMC and HT links.
quote: "Cache protocols have little to do with HT". Wrong. That's why there are 2 types of HT links: plain HT and HTcc specifically designed to run cache coherency protocols.
quote: Yes it is ! No matter who invented SSE2, it was a massive step to implement it, both for Intel and AMD.