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Engineers blame simulation for quad-core "showstopper"

More than a few people noticed Intel's roadmap originally slated 45nm Penryn desktop quad-core processors for January, only to have the company change the hard launch date to a not-so-firm "Q1 2008." So what happened?  In a series of interviews, the tale of quad-core Penryn began to unfold. 

Processor engineers, speaking on background, detailed the problem. "Intel is very sensitive to mean time to failures.  During a simulation, at high clock frequencies, engineers noticed an increase of potential failures after a designated amount of time."

He continues, "This is not acceptable for desktop customers that require longterm stability. It's a showstopper."

Previous reports of errata degrading the L2 and L3 cache performance were described as "false" -- desktop Penryn processors do not even have L3 cache. Microcode and BIOS updates issued by Intel since November do not fix or address the "showstopper" bug affecting the launch of the quad-core Q9300, Q9450 and Q9550 processors

The condition does not affect Xeon quad-core processors.  Xeon uses a different stepping than the quad-core processors, which fixes this simulated condition.  The quad-core 45nm Extreme Edition processor launched in November is also unaffected.

The company would not detail when the processors, originally scheduled for a January 20 launch but announced at CES last week, will see the light of day. Conservative estimates from ASUS and Gigabyte put the re-launch sometime in February.  Intel completely removed its January 20 launch from its December 2007 roadmap and has not issued a new roadmap since. 

Intel spokesman Dan Snyder says more. "We publicly claimed we will launch its 45nm mainstream processors in Q1 2008, and that's exactly what we did."  In fact, the company announced 16 new 45nm processors last week; most of which already shipped to manufacturers -- with the exception of the quad-core desktop variants affected by the showstopper simulation bug.

Taiwanese media was quick to pin the simulated problem on complacency and lack of competition from AMD.  Intel employees quickly denied the allegation, with the additional claim that the report was "humorous." 

At CES last week, Snyder elaborates.  "The tick-tock model prevents Intel from missing its launch dates.  If the 'tock' team misses a target date, it doesn't affect the 'tick' team."

Tick-tock, the strategy of alternating cycles of architecture change and process shrink, became official company policy on  January 1, 2006. 

As to why the new Macbook Airs still use the 65nm Core 2 Duo processors? Even after Foxconn alluded the new notebooks would get 45nm treatment?  Another Intel spokesman declined to respond, only stating, "Our partners are free to choose any of Intel's currently supported processors."  Anand Shimpi explores this more.


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RE: I call BS
By KristopherKubicki (blog) on 1/16/2008 11:38:04 AM , Rating: 2
Intel would not elaborate on what the symptoms would be for this bug. This is probably because they haven't actually replicated it outside of a simulation.

I'm guessing just one day you try to POST and it wont.

But you're right on about mission critical systems and stuff. You can't buy 10k EEs at a time for all the machines at your work -- and you wouldn't want to. The tolerances are tighter and the clocks more conservative on the mainstream chips.


RE: I call BS
By Mitch101 on 1/16/2008 1:34:44 PM , Rating: 5
LOL. Sounds like you are running into the circular discussions I ran into when we posted that yorkfield had a bug.

We know there is a bug that caused a delay its not the end of the world and will be corrected. Just have to wait a little longer for the chip.

The question is
Does the bug really matter if the chips containing it aren't released?

This isn't like the Phenom that is out in the wild that requires a bios update to ensure it doesn't run into the issue. Errata happens.

Had Intel released the chips into the wild and the bug happens then its big news. Till then its just a minor delay.


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