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Engineers blame simulation for quad-core "showstopper"

More than a few people noticed Intel's roadmap originally slated 45nm Penryn desktop quad-core processors for January, only to have the company change the hard launch date to a not-so-firm "Q1 2008." So what happened?  In a series of interviews, the tale of quad-core Penryn began to unfold. 

Processor engineers, speaking on background, detailed the problem. "Intel is very sensitive to mean time to failures.  During a simulation, at high clock frequencies, engineers noticed an increase of potential failures after a designated amount of time."

He continues, "This is not acceptable for desktop customers that require longterm stability. It's a showstopper."

Previous reports of errata degrading the L2 and L3 cache performance were described as "false" -- desktop Penryn processors do not even have L3 cache. Microcode and BIOS updates issued by Intel since November do not fix or address the "showstopper" bug affecting the launch of the quad-core Q9300, Q9450 and Q9550 processors

The condition does not affect Xeon quad-core processors.  Xeon uses a different stepping than the quad-core processors, which fixes this simulated condition.  The quad-core 45nm Extreme Edition processor launched in November is also unaffected.

The company would not detail when the processors, originally scheduled for a January 20 launch but announced at CES last week, will see the light of day. Conservative estimates from ASUS and Gigabyte put the re-launch sometime in February.  Intel completely removed its January 20 launch from its December 2007 roadmap and has not issued a new roadmap since. 

Intel spokesman Dan Snyder says more. "We publicly claimed we will launch its 45nm mainstream processors in Q1 2008, and that's exactly what we did."  In fact, the company announced 16 new 45nm processors last week; most of which already shipped to manufacturers -- with the exception of the quad-core desktop variants affected by the showstopper simulation bug.

Taiwanese media was quick to pin the simulated problem on complacency and lack of competition from AMD.  Intel employees quickly denied the allegation, with the additional claim that the report was "humorous." 

At CES last week, Snyder elaborates.  "The tick-tock model prevents Intel from missing its launch dates.  If the 'tock' team misses a target date, it doesn't affect the 'tick' team."

Tick-tock, the strategy of alternating cycles of architecture change and process shrink, became official company policy on  January 1, 2006. 

As to why the new Macbook Airs still use the 65nm Core 2 Duo processors? Even after Foxconn alluded the new notebooks would get 45nm treatment?  Another Intel spokesman declined to respond, only stating, "Our partners are free to choose any of Intel's currently supported processors."  Anand Shimpi explores this more.

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RE: I call BS
By defter on 1/16/2008 11:05:38 AM , Rating: 2
According to some rumours, this bug affected compatibility with some chipsets.

QX9650 and 45nm quad core Xeons are officially supported only by Intel's chipsets and thus they aren't affected.

RE: I call BS
By KristopherKubicki on 1/16/2008 11:08:49 AM , Rating: 2
I've seen this bug blamed on everything from L2 design to chipsets to ambient radiation. I grilled Intel on pretty much every angle I could come up with, and the simulated MTTF is pretty much the answer they kept coming back to.

RE: I call BS
By Oregonian2 on 1/16/2008 1:39:01 PM , Rating: 2
Is it possible that maybe that really is the problem?

RE: I call BS
By Mitch101 on 1/16/2008 2:10:35 PM , Rating: 3

We were hearing its related to the 1600mhz FSB.

The best reasoning we heard was Intel wants the 1600Mhz FSB to prevent overclockers as much as possible. If they use the 1333FSB they have to obviously increase the multiplier allowed making all the chips great overclockers. Basically drop the multiplier and increase the FSB up easy enough since mobo's chips have a good amount of overhead. If they are able to sell the chips at 1600mhz FSB this will limit overclocking because the chips are running near top FSB speed and can lock the multiplier lower. But not all the chips run 100% stable over time at this speed. If you look at the 45nm chips even the low end is a very good overclocker because of the FSB overhead. If Intel can use the higher FSB and lock the multiplier lower then more people would be required to purchase the higher cost chips to really get higher speed. It also allows Intel to sell 1600Mhz certified mobos with their new chipsets. Its a two sell approach your buy a new chip and to take advantage of it you need to buy a new mobo. We know FSB can go higher but it may not be 100% stable for server use with lousy cooling for them to release the chips.

Like you we've heard numerous reasons. One where hot spotting is causing the chips poof.

But who knows what the truth is.

"A politician stumbles over himself... Then they pick it out. They edit it. He runs the clip, and then he makes a funny face, and the whole audience has a Pavlovian response." -- Joe Scarborough on John Stewart over Jim Cramer
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