backtop


Print 76 comment(s) - last by poohbear.. on Dec 5 at 3:14 AM

Quad-core, HyperTransport 3.0 and more

AMD is expected to release its 65nm products soon. Moving beyond the 65nm Brisbane die shrink and Windsor FX, AMD has a couple of other tricks up its sleeves. AMD plans to transition from its Cities core products to new Stars cores. This transition uses AMD’s new core naming scheme. While AMD has typically named its processor cores after cities, the new naming scheme uses star names.

The Stars family includes the upcoming Agena FX, Agena, Kuma, Rana and Spica cores. AMD will be introducing plenty of architectural changes with the upcoming Stars family. Stars family processors will switch over to AMD’s previously announced HyperTransport 3.0 architecture. Previously, Star processors have been referred to as Revision H or K8L -- if that's not confusing enough, AMD calls the architecture of the Stars family Greyhound. While Stars family processors use the HyperTransport 3.0 protocol, it will be backwards compatible with HyperTransport 1.0 systems.

HyperTransport 3.0 is expected to provide twice the amount of bandwidth between the processor and chipset. It will also allow the processor and internal north bridge to operate at different frequencies as well. With HyperTransport 3.0, the north bridge can operate at 75% of the maximum clock frequency of the processor. AMD roadmaps claim the greater bandwidth of HyperTransport 3.0 is important for PCIe 2.0 and upcoming multi-GPU, integrated graphics and multiprocessor performance.

In addition to HyperTransport 3.0, Stars family processors feature a 128-bit floating point unit for each CPU core, DDR2-1066 support, SSE4A instructions and a split power plane. Split power planes allow the processor and internal north bridge to operate at different voltages and speeds. The advantages of split power planes are it allows the north bridge speed and voltage to never change during Cool’n’Quiet power saving measures. With split power planes the Stars processors require separate PLLs for the processor and internal north bridge.

Stars family processors will use socket AM2+, with the exception of the Agena FX. Nevertheless, Stars family processors will be backwards compatible on socket AM2 motherboards, though performance is sacrificed by falling back to HyperTransport 1.0. AMD's documentation no longer refers to AM3; it appears AM2+ is the expected socket AM3.

Beginning in Q3’2007 AMD is expected to release its first Stars quad-core processors. The new quad-core processors are based on AMD’s Agena and Agena FX cores. Targeting AMD’s 4x4 platform is the Agena FX core. Agena FX will only be available on Socket 1207+ and offer dual processor functionality. The vanilla Agena core will be available on single processor socket AM2+ platforms.

Agena FX and Agena based processors offer identical features. New to the Agena FX and Agena cores is a shared L3 cache. 2MB of L3 cache will be shared between all four processor cores. The L2 cache will be 2MB as well. Clock frequencies of 2.7 GHz to 2.9 GHz are initially expected. The HyperTransport 3.0 frequency for Agena FX and Agena cores is expected to be clocked at 4000 MHz. Agena FX and Agena core processors will be manufacturing using a 65nm process and carry 125W TDPs. The first Agena FX and Agena based processors are expected to arrive in Q3’2007.

AMD will be releasing new Kuma core dual-core processors in Q3’07 as well. The new Kuma core processors feature HyperTransport 3.0 clocked at 4000 MHz, 1MB of L2 cache and 2MB of shared L3 cache. Kuma processors are expected to arrive in 2.0 GHz to 2.9 GHz frequencies for socket AM2+. TDP for Kuma core processors is expected at 89W and 65W.

Single-core products won’t be left out of the Stars family either. AMD will release single-core Rana and Spica cores towards the end of 2007. Rana core processors will be replacing Orleans and Lima Athlon 64 single-core processors while Spica will be replacing single-core Venice Athlon 64 and Manilla Sempron processors. AMD’s roadmap doesn’t reveal too much on Rana and Spica. Nevertheless, Rana and Spica will feature HyperTransport 3.0 and socket AM2+ compatibility.



Comments     Threshold


This article is over a month old, voting and posting comments is disabled

Bit Slower than I would of liked
By Zurtex on 11/14/2006 6:56:32 PM , Rating: 1
Was hoping that they'd have ramped up development process and have AM3 and K8L out by the end of 2007 :(

Unless Stars provides significant performance increase, they're not going to be able to get themselves out of anything other than providing budget CPUs.




RE: Bit Slower than I would of liked
By Korvon on 11/14/2006 6:59:59 PM , Rating: 1
"The new Kuma core processors feature HyperTransport 3.0 clocked at 4000 MHz"

A 4GHZ quad core... seems like a improvement to me.


RE: Bit Slower than I would of liked
By Goty on 11/14/2006 7:01:46 PM , Rating: 2
4000MHz is the speed of the HT bus, not the clockspeed of the processor.


RE: Bit Slower than I would of liked
By kamel5547 on 11/14/2006 7:04:23 PM , Rating: 2
Its not a 4 Ghz quad core, its a 4 ghz hypertransport bus (currently @ 2 Ghz). Who knows how much of a boost this will actually bring.


RE: Bit Slower than I would of liked
By Goty on 11/14/2006 7:15:08 PM , Rating: 2
Well, since the A64 STILL isn't bandwidth limited in any case, I'm not thinking all that much.


RE: Bit Slower than I would of liked
By TiberiusKane on 11/14/2006 7:31:24 PM , Rating: 2
I'm not sure whether the FPU is going to be put on the same chip and I don't know how it works, but is there a chance that they're ramping up the bandwidth to prepare for putting in a GPU as well? Because then, there would be bandwidth demand. What effect does the HyperTransport have on a hypothetical on-die GPU?


RE: Bit Slower than I would of liked
By saratoga on 11/14/2006 8:21:22 PM , Rating: 2
The FPU was brought on die in the 386 era, so yes, these cores will have on die FPUs. Its really not possible to build a modern x86 core without one because of how the ISA works.

Putting the GPU on die would make the HT bandwidth a lot less important, since on single processor systems the GPU uses virtually all of the HT bandwidth. Putting it on die would remove that traffic, leaving only sound cards, NICs, hard disks, etc.

The faster HT clock is aimed at mulitsocket systems. The current HT setup was barely adequate for 8 socket systems, and could use improvement at 4 sockets too.


RE: Bit Slower than I would of liked
By aGreenAgent on 11/14/2006 9:35:44 PM , Rating: 2
Well, you're assuming that the on-die GPU is all the GPU power of the system. Having a graphics card and a GPU on the CPU (which is the idea, I think) would still require the same bandwidth as it does without the on-die GPU (give or take).


By saratoga on 11/14/2006 9:45:34 PM , Rating: 2
quote:
Having a graphics card and a GPU on the CPU (which is the idea, I think) would still require the same bandwidth as it does without the on-die GPU (give or tak


Yes, obviously if you do not use an on die GPU, then this doesn't apply to you. I'm not really sure what you're getting at though.



By saratoga on 11/14/2006 9:49:32 PM , Rating: 2
Ah, you mean using both at once. Still I don't really see how thats relevent to what I wrote. Either you save HT bandwidth by using the onboard and skipping PCI-E, or you don't. Either way, it doesn't really make a difference from today.


RE: Bit Slower than I would of liked
By Calin on 11/15/2006 3:24:28 AM , Rating: 2
On gaming machines, the HT link might be used almost only for the GPU traffic - but once you start gaming, the GPU will access its memory (video card memory) at some extraordinary rate (gigabytes/second). If you put the GPU on CPU, you will need to give it fast memory access (as of now, a GPU could use a 128-bit lane to 500MHz DDR memory. Future GPU - see 8800 - uses thrice the width)
No, video cards are here to stay for the performance sector


RE: Bit Slower than I would of liked
By Viditor on 11/14/2006 7:35:49 PM , Rating: 3
quote:
Was hoping that they'd have ramped up development process and have AM3 and K8L out by the end of 2007


Ummm..."Stars" processers ARE K8L. As to AM3, that wouldn't really make sense as DDR3 isn't even available yet, and will be extremely expensive in 2007 even if it does show up.
The change in "Stars" is rather major according to all of the documentation...it should (on paper) equal or surpass Core 2 architecture when combined with HT and the ODMC.

What I don't get is the reference to release in Q3 by the author...AMD has been stating that they will begin release of the new cores late in Q2. If there's been a change, it would be nice to see a post of the link for it.


RE: Bit Slower than I would of liked
By Aikouka on 11/15/2006 8:45:31 AM , Rating: 2
Problem is... if I remember Intel's roadmap correctly, their new 65nm refresh comes out Q2 2007. I'm not sure if it's a refresh or a change, though... been awhile since I've seen the chart!


RE: Bit Slower than I would of liked
By othercents on 11/15/2006 11:06:03 AM , Rating: 2
If Intel's 65nm refresh is in Q207 then they fit right in line with AMDs 65nm products coming out in 1Q07 and then there star product line coming out in 3Q07. I just can't believe that AMD is actually going to allow a full year to go buy before they produce something significant to compete against Intel C2D.

I do believe that AMD has more up its sleeve than it is letting on. For example if you can get HT3.0 to work all the way to the GPU on an ATI graphics card then you will definitely see a performance boost over the competitors. Only time will tell and I believe that AMD is now cutting it close and with this roadmap. You might see many more AMD faithful buying their first Intel C2D machine this Christmas.

Other


RE: Bit Slower than I would of liked
By surt on 11/15/2006 1:23:30 PM , Rating: 1
quote:
I do believe that AMD has more up its sleeve than it is letting on. For example if you can get HT3.0 to work all the way to the GPU on an ATI graphics card then you will definitely see a performance boost over the competitors.


That's not likely to be true. Games and graphics are generally not very CPU-GPU bandwidth limited. They are almost exclusively GPU performance limited.


RE: Bit Slower than I would of liked
By Viditor on 11/16/06, Rating: 0
RE: Bit Slower than I would of liked
By Spoelie on 11/14/2006 7:40:08 PM , Rating: 4
As far as i can tell, the stars family IS the K8L architecture


RE: Bit Slower than I would of liked
By Zurtex on 11/14/2006 9:03:21 PM , Rating: 2
Ahh right super :-)

Looking at the chart it just appeared to be a name change because they were introducing HT3.0 and AM2+


By OcHungry on 11/14/2006 7:42:08 PM , Rating: 2
yeah right...
128bit floating point, Hypertransport3, L3 shared cache, DDR2 1066, independent power management, and bunch of other (not revealed) changes/improvements are just peanuts to you...
Give me a break. According to Mr. Ruiz "it’s a killer CPU"
I wonder what he meant by that? don’t you?
The backward compatibility is very delicious. As matter of fact everything so delicious.


By leidegre on 11/15/2006 1:54:13 AM , Rating: 2
On the contrary, AMD should be able to suprise most of us. In the past they have done excellent work, and if they see the need to hold back production to meet expectations, so they should.

Both Intel and NVIDIA provide better perfomance in thier products, and that is a big challange to take on for AMD, since they now entered the graphics market to. However, I have great confidence that they will delivier, and that it's a matrue move to hold back. Instead of rushing development and increasing costs, they take the time to invest and devlope in new technology, and will strike from below again.

Over the last two years AMD har been the provider of the best CPUs, now that has shifted, and looking at this road map, it's to me more clear that AMD is taking time off, before rentering with kick-ass solutions.

Time will tell what happens. I'm physced about it, but only time will tell.


Slip...
By Joeychips on 11/14/06, Rating: 0
RE: Slip...
By Goty on 11/14/2006 7:59:57 PM , Rating: 2
Care to provide a link to performance numbers?


RE: Slip...
By Russell on 11/15/06, Rating: 0
RE: Slip...
By othercents on 11/15/2006 11:10:24 AM , Rating: 2
A die shrink are architectural improvements. Most die shrinks allow more headroom for overclocking especially since there is less heat and lower power consumption. Most of the die shrinks we have seen have increased performance along with allowing the clockspeed to be increased significantly.

Other


RE: Slip...
By brisbane on 11/15/2006 11:07:55 PM , Rating: 4
By architectural improvements, he probably meant stuff like adding the extra complex decoder, or out-of-order load and store, and adding extra instructions, enhanced SSE, etc.

Also, I do not see how a die shrink can qualify as an architectural improvement. The improvement is in the fabrication process.


RE: Slip...
By drebo on 11/14/2006 8:03:45 PM , Rating: 2
quote:
the poor performance of 65nm revealed today


What the hell are you babbling about?

AMD stock closed up today, FYI.


RE: Slip...
By Tsuwamono on 11/14/2006 8:50:35 PM , Rating: 2
dont pay attention to idiots


RE: Slip...
By Khato on 11/14/2006 9:05:54 PM , Rating: 2
I believe the notion was towards the fact that the article here, "AMD 65nm Product Plans Unveiled" showed no advantages to the 65nm process over the current 90nm. (That statement somewhat ignores the stated TDP values, as they're relatively worthless anyway. If you include them, then there is a -slight- advantage in the high frequency.) But then there's the fact that the fastest 65nm part is going to be slower than the fastest 90nm for at least 3 months - a supposed Q2'07 release for 2.8GHz 65nm part.

It's understandable that AMD wouldn't be getting much out of their first 65nm part though, at least it doesn't appear to be another Thoroughbred.

As to K8L, well, I'd expect to be enjoying a Penryn by that time anyway.


RE: Slip...
By Viditor on 11/14/2006 9:11:33 PM , Rating: 2
quote:
As to K8L, well, I'd expect to be enjoying a Penryn by that time anyway

Then you should get used to dissapointment...:)


RE: Slip...
By Khato on 11/14/2006 10:18:24 PM , Rating: 2
True true, but I like forgetting about the ~2 month delay from launch to when I can get one for cheap ;)


RE: Slip...
By Viditor on 11/14/2006 10:29:37 PM , Rating: 3
Penryn is scheduled to SHIP at the end of Q4 07...so you can expect those lower prices at the end of Q1 08...


RE: Slip...
By saratoga on 11/14/2006 9:43:16 PM , Rating: 3
quote:
I believe the notion was towards the fact that the article here, "AMD 65nm Product Plans Unveiled" showed no advantages to the 65nm process over the current 90nm.


As a roadmap, it didn't show much of anything. To see the advantages of 65nm at the same clock speed as 90nm, you'd have to test power dissipation, something that requires an actual chip, not a roadmap.

quote:
But then there's the fact that the fastest 65nm part is going to be slower than the fastest 90nm for at least 3 months - a supposed Q2'07 release for 2.8GHz 65nm part.


Ramp ups for new processes are slow and complicated. AMD does this every shrink. Remember, their 180nm process launched at a max of 700MHz, and then scaled to 1733MHz as they improved it. 130nm also started a meager 1800MHz and eventually climbed much higher.

The real interesting part is the power consumption, since this will dicatate how aggressively they can push their designs.


RE: Slip...
By coldpower27 on 11/17/2006 11:34:59 PM , Rating: 2
K8L has always been slated for Q3 2007 for the Desktop arena, Barcelona which is the DP/MP variant of K8L will be released in Q2 2007 most likely.

Intel didn't gain much performance either with the 65nm NetBurst derived products either. Though power consumption has been trimed down quite a bit.

This is the same but on AMD's side, Brisbane is a optical shrink of the 2x512KB Windsor SKU. So it will run cooler and have a smaller die size. It also allows 0.5x Multipliers.

Just like how Cedar Mill and Presler allows Multiplier as low as x12 from Prescott's x14.


RE: Slip...
By Viditor on 11/18/2006 8:23:45 AM , Rating: 2
quote:
K8L has always been slated for Q3 2007 for the Desktop arena, Barcelona which is the DP/MP variant of K8L will be released in Q2 2007 most likely


Agreed...so in 2007,

Q2 - (end of Q2 actually) is Barcelona (Quad-core K8L for servers), and possibly the first mobile K8L parts.
Q3 - K8L desktop parts including quad core for desktop

The new sockets (AM2+ and 1207/F+) are backwards compatible and identical to AM2 and Socket F, however the non + sockets won't be able to use HT 3.0.

quote:
Intel didn't gain much performance either with the 65nm NetBurst derived products either. Though power consumption has been trimed down quite a bit


I agree here as well. Both AMD's Brisbane and Intel's Penryn won't gain very much in performance with their respective die shrinks, but they should cost less and run cooler (with more headroom for clocks, but not a huge amount).


RE: Slip...
By coldpower27 on 11/19/2006 9:51:59 AM , Rating: 2
For Intel's Penryn that will be different, there they will likely use the added headroom of the 45nm envelope to provide some additonal clockspeed in addition to the larger 6MB of LV2 cache withtin the same thermal envelope as Merom.

Brisbane has a long way to go since it's a 2x512KB part and will only start out at 2.6GHZ maximum, and isn't really designed to ramp up in clockspeed as the focus will be K8L, though K8's will remain a significant share of AMD's production. It's more about economical production for the mid range and low end rather then high performance.


RE: Slip...
By Viditor on 11/19/2006 10:18:49 AM , Rating: 2
quote:
For Intel's Penryn that will be different, there they will likely use the added headroom of the 45nm envelope to provide some additonal clockspeed in addition to the larger 6MB of LV2 cache withtin the same thermal envelope as Merom


How is that different? Brisbane will certainly clock much higher than 90nm, and the on-die mem controller lets it have low latencies without a large cache (which is the major reason Intel needs the large cache for C2D).

Just because the very first parts start at 2.6 GHz doesn't mean anything, and should definately be expected...
ALL chips (both Intel and AMD) of a new node, launch at clockspeeds lower than the highest of the previous node.

For example...Conroe, Pressler, Prescot, Northwood, Winchester, etc... all started shipping at slightly lower clockspeeds than the highest end.
And the closckspeeds will most certainly continue ramping (they aren't going to end the line within 7-10 months of launch), they will just become the Sempron variants.


RE: Slip...
By coldpower27 on 11/21/2006 4:04:38 PM , Rating: 2
Perhaps through overclocking, but there isn't any slated SKU's that are 3GHZ level or higher for that core.

I don't expect the Brisbane core to scale that far if at all as AMD concentrates on K8L in Q3 2007 and beyond. Since 2.8GHZ Brisbanes will be launched in Q2 2007, there isn't a dire need for a clockspeed ramp then as K8L is only 1 Quarter away.

And Winchester never got past 2.2GHZ so that SKU wasn't ramped period.

Northwood started life at equal or greater then previous generation Willamette core, no clockspeed was lost period. Pentium 4 Northwood 2.2/2.0GHZ variants were release followed later by lower SKU's.

Conroe is irrelevant as it's architecture philosophy is too different then that of NetBurst to be directly compared to it.

Presler launched at greater speeds then the old Smithfield core, no clockspeed was lost either.

The only one you can vouch for is Prescott which launched at mainstream SKU's first before ramping up clockspeed over time. But again that is a limelight core that needed to be used for a significant period of time.

Brisbane is unlikely to see anything beyond 2.8GHZ, as they will be concentrating on ramping K8L rather then the old K8 derivatives.

It's different because Penryn will be the limelight processor, for the mobile arena, while Brisbane is basically a test platform for the 65nm process for AMD, Agena is the one that would ramp clockspeed.

Smeprons won't turn Dual Core anytime soon, so they aren't Brisbane derivatives, they will likely be based on disabled Lima cores, and they also will likely not scale to far as AMD will be releasing Sempron Spica which is K8L based in Q3 2007 as well.




Hmm
By InvisibleEcho on 11/14/2006 8:47:48 PM , Rating: 1
Will the advent of performance gains with 65nm die shrinks and expanded DDR2 support stave off the Core 2 Duo juggernaut long enough for K8L to level the playing field? Stay tuned for the next exciting edition of AMD vs Intel!

...In all seriousness, I was kind of hoping for K8L and more reactivity to 45nm a little sooner. Intel's throwing their industrial and corporate weight around aggressively, and it would be nice for us consumers if AMD managed to up the ante again :) I expect that by the time 45nm rolls around for AMD Intel's going to be pushing 32nm, and double again the number of cpu cores, and so on. On another note, the only thing I find troublesome about the integrated memory controller is that it seems like every time a new type or speed of memory comes out, you get yet another mobo socket to utilze with the revised CPU. I wonder, though, how long (if any) that integration delays development for a new core revision. Still, I like that particular feature, but of course there are newer things in the pipeline, like always.




RE: Hmm
By Viditor on 11/14/2006 9:09:22 PM , Rating: 2
quote:
I expect that by the time 45nm rolls around for AMD Intel's going to be pushing 32nm

AMD is releasing 45nm 6 months after Intel...Intel is shipping their 45nm at the end of 2007 (which means they are starting production in Q2-3). AMD is shipping 45nm in July 08...


RE: Hmm
By JackPack on 11/14/06, Rating: 0
RE: Hmm
By Viditor on 11/14/2006 11:20:19 PM , Rating: 4
quote:
That's if you believe AMD's timeline... which has never been correct when describing their process nodes

Huh? When were they wrong on process nodes?
quote:
AMD has to amortize the cost of 65nm equipment first before jumping to the next node

Actually, they don't...I think you're forgetting that they are building new Fabs for those nodes (no changes needed to existing equipment, it will be new equipment).
I agree that in the past this was true, but that was when they only had a single Fab...


RE: Hmm
By Viditor on 11/14/2006 11:32:55 PM , Rating: 2
By way of follow-up, remember that AMD demonstrated 45nm SRAM just 3 months after Intel demonstrated 45nm SRAM...
I would say that the times (6 months later than Intel for CPUs) seem to correspond just right.


RE: Hmm
By JackPack on 11/15/2006 7:05:44 AM , Rating: 2
For me, an SRAM test vehicle is just that. It means they can print something using 45nm design rules, not that they're close to being able to manufacture 45nm processors. Unless there's a tape-out annoucement (or strong rumor of one) like there was with K8L in August indicating 65nm was ready, I don't find these demos too convincing.


RE: Hmm
By JackPack on 11/15/2006 6:47:17 AM , Rating: 4
quote:
Huh? When were they wrong on process nodes?

They were wrong almost every time. Let's look at a 2003 article: http://www.eetimes.com/story/OEG20030612S0005

AMD will bring SOI (silicon-on-insulator) technology to its microprocessors made with 90-nm design rules later this year . For the 65-nm node expected to come to manufacturing in 2005 , AMD has a goal of integrating strained silicon channels with SOI substrates

Obviously, AMD didn't have 90nm in 2003 nor 65nm in 2005. Their initial estimates have always been lofty goals that were later pushed out. You can dig back to 130nm and see the same thing.

quote:
Actually, they don't...I think you're forgetting that they are building new Fabs for those nodes (no changes needed to existing equipment, it will be new equipment).
It's the same idea. The capital needs to come from somewhere. Yes, Fab 38 is planned, but the capital isn't there, particularly after the ATi acquisition. Even with 65nm, AMD didn't have the money until Q2'06 for the equipment. If you look at AMD's 10-K filing, spending on process tech capital equipment is very much dependent upon IBM. Unless IBM is ready and willing for 45nm, it will be delayed.


RE: Hmm
By Viditor on 11/15/2006 8:46:30 AM , Rating: 3
quote:
They were wrong almost every time. Let's look at a 2003 article:

That was a mistake by EETimes (or they got confused)...AMD was solid on their 90nm shipping date of July 2004 and first production date of Dec 2003 (which is when they did indeed begin production)...this long lead time is due to:
1. AMD had only one Fab, and conversion is a slow process.
2. They needed to build up enough inventory for the launch (which was quite extensive).

Also (if you will recall) Intel did "release" 90nm in Jan of that year, but they had no inventory. In fact they had so few chips produced that Dell had to cancel all sales of Prescott systems for a whole quarter (until mid-April) until Intel could get them made.

As to 65nm, what AMD said (and most people who don't understand the semi business don't get this) was that they would begin production of 65nm in Aug 2006...in fact they began in June/July.

I challenge you to find any quote from AMD that agrees with what EETimes "reported".

quote:
Yes, Fab 38 is planned, but the capital isn't there, particularly after the ATi acquisition


Sure it is! In fact, once again Dresden agreed to subsidise the funding quite some time ago. All of the future expense of Fab 38 is already locked in (in fact that was a condition of the Morgan-Stanley loan for ATI, listed in the 10-Q).
quote:
If you look at AMD's 10-K filing, spending on process tech capital equipment is very much dependent upon IBM

Huh? I have no idea what you mean here...could you give me a clue what section of the (I assume you meant 10-Q and not the 8-K) you are referring to?
As AMD is the co-developer of the process (it's not IBM's process alone), and AMD is installing their own solely owned lines, I fail to see what IBM has to do with 45nm at all (except that they also have rights to the process).
Even though it was developed at IBM's Fab in East Fishkill, AMD had paid for half the cost of the equipment in that Fab as part of their original deal...


RE: Hmm
By trivik12 on 11/15/2006 7:33:37 AM , Rating: 4
AMD has never kept its targets for process shrink. They were hoping to be on 65nm by Mid 2006 as late as Mid 2005. Then it became 2nd half 2006, then Q4 2006 now Dec2006. You probably wont see any 65nm processors in market this year (only revenue shipments).

Even 4x4 got postponed in 11th hour. I cant see AMD going to 45nm before Q1 2009.

Intel is releasing 45nm Yorkfield Q3 2007. By Q4 it should be decent amount of 45nm processors. Intel has kept all its schedules last year or so except for itanium. They infact pulled forward release of MCW and Clovertown/Kentsfield.


RE: Hmm
By Viditor on 11/15/2006 9:07:58 AM , Rating: 2
quote:
They were hoping to be on 65nm by Mid 2006 as late as Mid 2005

As I posted to Jack, they WERE on 65nm volume production by mid 2006...
quote:
Intel is releasing 45nm Yorkfield Q3 2007. By Q4 it should be decent amount of 45nm processors.

And this is how it starts...
Intel is not releasing in Q3, they are producing in Q3. They are shipping at the end of Q4 (if you don't believe me, go look at Intel's slides from Fall IDF...they show availability starting in Q1 08).
Remember that it takes ~3 months (called a "turn") to make a chip, once you have everything in place. Standard practise is volume production for 1.5-2 turns prior to release so that you can build up enough inventory...

quote:
Intel has kept all its schedules last year or so except for itanium. They infact pulled forward release of MCW and Clovertown/Kentsfield


Ummm...Prescott was quite delayed, and Cloverton (no "w") and Kentsfield are EXTREMELY low volume parts...


RE: Hmm
By coldpower27 on 11/17/2006 11:13:41 PM , Rating: 2
quote:
Ummm...Prescott was quite delayed, and Cloverton (no "w") and Kentsfield are EXTREMELY low volume parts...


And Prescott has nothing to do with this as Prescott DOES NOT fall into the last year.

As well Clovertown with the "W" is the more prevalent term used on Intel's website.

I don't know what to say on Clovertown's low volumeness, as it is being intorduced in SKU's that range in 455 to 1172 US. So I doubt the limitedness of Clovertown. At that kind of pricing targeted for buisness, I expect Clovertown is pretty much heading toward large volumes.

Kentsfield for the moment I can agree as it is only intorduced as 1 SKU for 999 USD to the consumer market which is less likely to spend that much on a processor.

We will have to see if AMD and Intel can maintain their schedules, though the present rumors are for Q3 2007 for 45nm SKU's for Intel.


RE: Hmm
By Viditor on 11/19/2006 11:00:59 AM , Rating: 2
quote:
And Prescott has nothing to do with this as Prescott DOES NOT fall into the last year


I guess I didn't see (or understand the reason for) the limitation of 1 year...oops.

quote:
I don't know what to say on Clovertown's low volumeness, as it is being intorduced in SKU's that range in 455 to 1172 US. So I doubt the limitedness of Clovertown


In the future, I agree...but not this year.
C'mon CP, you know as well as I do that there are still several months of qualifying needed before Cloverton is ready for mass sales...

The whole point I was making is that it's very easy to push a part forward if you don't need large volumes! Heck, I would bet that AMD could release K8L in January at very low volumes...but that would merely be a PR stunt as the platforms started to be qualified in August and they will need to ship in high volume from day 1 as replacement parts for existing systems (I also expect Cloverton to be shipping in high volume by then as well, but that's Q2 07).


RE: Hmm
By coldpower27 on 11/21/2006 4:34:14 PM , Rating: 1
quote:
I guess I didn't see (or understand the reason for) the limitation of 1 year...oops.


Well read more carefully next time, and that is what the previous poster was impressed by, the poster was impressed that Intel maintained it's schedules for the past year. Hence I reiterate nothing to do with Prescott. It's very simple actually, if I am talking about something that is happening within the past year and specifically say so, why would you respond with something that happened 2-3 years ago, which isn't what I was talking about at all.

quote:

In the future, I agree...but not this year.
C'mon CP, you know as well as I do that there are still several months of qualifying needed before Cloverton is ready for mass sales...

The whole point I was making is that it's very easy to push a part forward if you don't need large volumes! Heck, I would bet that AMD could release K8L in January at very low volumes...but that would merely be a PR stunt as the platforms started to be qualified in August and they will need to ship in high volume from day 1 as replacement parts for existing systems (I also expect Cloverton to be shipping in high volume by then as well, but that's Q2 07).


Actually from what I have read, Intel's ramping up the lower bins now, though until you can provide me with something other then the a statement it takes a long time to ramp Server processors, we will have to see how much of Intels' product mix Clovertown makes, I still doubt Clovertown's limited volumeness, however it's impact on Q4 is likely not to be quite significant, as it's so late in the quarter anyway.

Yeah right, considering K8L is dependent on the 65nm process they couldn't push that out even if they wanted. Are you trying to imply Clovertown is a PR stunt?

I expect relatively high volumes of Clovertown in Q1 2007, due to the price drop however it shouldn't displace Woodcrest, as Woodcrest occupies lower pricing tiers.




Sigh
By archcommus on 11/14/2006 7:22:01 PM , Rating: 2
Sounds like catch-up and not anything new. So can we not expect AMD to pull ahead anytime before 2008?




RE: Sigh
By saratoga on 11/14/2006 8:24:37 PM , Rating: 2
Power planes are new I believe. HT 3.0 + L3 cache will put them even farther ahead of intel at the very high end (8-32 cores).

The SSE + front end improvements should largely close the gap between Core 2 anyway. Whats up in the air is clock speed. If they can't ramp it, its not going to matter if per clock performance is the same or even better.


RE: Sigh
By Missing Ghost on 11/14/2006 9:04:51 PM , Rating: 2
The Athlon 64 does not seem to need that much cache or to use that much hypertransport bandwidth. So I doubt performance will change much.


RE: Sigh
By saratoga on 11/14/2006 9:36:05 PM , Rating: 2
quote:
The Athlon 64 does not seem to need that much cache or to use that much hypertransport bandwidth.


The Athlon 64 also does not have 8-32 cores either. I am suggesting that systems with 8-32 cores will require more bandwidth then those with a single core.

Do you disagree with this?


RE: Sigh
By aGreenAgent on 11/14/2006 9:42:08 PM , Rating: 2
There should be HUGE performance gains. This is a NEW processor core. It's not a pumped up current Athlon 64 core. It's just something new entirely. Maybe this new one is cache/bandwidth limited? You don't know, I don't know. Speculating on performance of the chip is just guessing completely. All you can say with any sort of certainty is that it'll be faster than current shit.


RE: Sigh
By Russell on 11/15/2006 12:27:49 AM , Rating: 3
The L3 cache is not designed as a data or instruction cache like the L2 is. It's designed for inter-core communication so that the different cores don't have to go through the HT bus to exchange info in their caches. This, along with various other improvements AMD is making, will help to speed up quad-core (or greater) systems, particularly in the server market.


RE: Sigh
By Viditor on 11/14/2006 10:16:16 PM , Rating: 5
quote:
Sounds like catch-up and not anything new

Sadly, all of the changes aren't listed in the article (and I'm not sure where they got the diagram from, but the only things AMD has stated for quad core K8L is Q2 07...).

Enhancements include:
1. Increase from 16B to 32B instruction fetch
2. Enhanced branch prediction
3. out-of-order load execution
4. Increase to dual 128 bit SSE and loads
5. SSE4a
6. Split power
7. Double HT speed (on AM2+ sockets)
etc...
To quote from X-bit Labs comparison to Conroe:

"K8L will be able not only to compete successfully but even to outperform Conroe. The inability to decode and retire 4 commands per clock cycle in some cases may result into tangible performance gaps in integer applications. However, it may not be of that much importance in most cases, because the typical instruction execution pace in real integer applications does not exceed 2-2.5 instructions per cycle because of the data dependence"

http://tinyurl.com/wqzry


RE: Sigh
By xFlankerx on 11/15/06, Rating: 0
RE: Sigh
By dwalton on 11/15/2006 3:40:28 PM , Rating: 4
"The expansion of SSE instruction sets will help improve the performance significantly in applications dealing with heavy floating-point or integer calculations using SSE instructions, where K8L will be able not only to compete successfully but even to outperform Conroe."

Please, If you going to quote something, quote the complete thought and not a fragment. You quoting out of context.


North Bridge
By mendocinosummit on 11/14/2006 8:27:39 PM , Rating: 1
A integrated north bridge in to a CPU? Wonder what the benefits will be of that and the limitations (variety).




RE: North Bridge
By Etsp on 11/14/2006 8:53:06 PM , Rating: 3
..... The northbridge is the memory controller... AMD's had it On-die since A64....


RE: North Bridge
By johnsonx on 11/14/2006 10:05:20 PM , Rating: 2
quote:
AMD's had it On-die since A64


Actually AMD's northbridge has been on-die since Opteron, since it was the first member of the K8 family to appear.

My first reaction to the original poster was to lambast him as an ignorant fool to not know that the 'Northbridge' has always been on-die in the K8 core. However I have tempered my thoughts a bit. Indeed one might say that given the fact the AMD's memory controller is on-die, then that's simply no longer part of the 'Northbridge' on the AMD platform. The memory controller is but one function of the traditional Northbridge. Many other functions such as the AGP, PCI, & PCI-Express bus interfaces are still in the 'Northbridge' as provided by NVidia, ATI, AMD, VIA, SiS, ULi, ServerWorks, etc.

In the end I suppose what's relevant here is to point out to the original poster that there is no change in the functionality of, or relationship between, the 'Northbridge' memory controller on the CPU die and the 'Northbridge' chip on the board that interfaces to the various I/O busses. Everything still works as it did, the change in the 'Stars' family K8-L is that the on-die 'Northbridge' will have it's own power plane and clock source rather than sharing with the CPU core.


Beyond AM2
By brisbane on 11/15/2006 9:34:02 AM , Rating: 5
It seems after all, that the Brisbane is no more than a die shrink, with no architectural improvements. All the rumors about a Rev G turned out to be just that, rumors.
Either AMD does not have an answer to the Core processors yet, or the resources to get out the goodies onto an actual chip. In either case, its going to be pretty tough for AMD to limit the damage to its market share the Core processors will cause.




hmmm
By valkator on 11/15/2006 5:34:13 PM , Rating: 2
Well think about something here... It isnt games that are cpu to gpu bandwidth limited or to other system resources. So why else would you add more "horsepower" to the HTT 3.0? Vista anyone? LOL. That power hungry inefficient beast of an OS is going to need all the help it gets.




RE: hmmm
By saratoga on 11/15/2006 5:47:16 PM , Rating: 3
quote:
Well think about something here... It isnt games that are cpu to gpu bandwidth limited or to other system resources.


No, its large multiprocessor systems.

quote:
So why else would you add more "horsepower" to the HTT 3.0?


Because the current link is too slow for more then 2 sockets even with single core. Throw in 2-4 cores per socket and its anemic. This will allow AMD to sell quad core 2-4 socket systems that cannot be matched by Intel's offerings.

quote:
Vista anyone? LOL.


Did you actually laugh out loud as you typed that?


K8L
By TheDoc9 on 11/15/2006 11:54:23 AM , Rating: 2
Anyone know if one of these is K8L? I remimber them mentioning it will be out around mid 07'! Are there any concret anouncements




RE: K8L
By coldpower27 on 11/17/2006 11:46:36 PM , Rating: 2
Basically from observation anything that is Socket AM2+ and HyperTransport 3.0 are K8L derivatives.


No Intel Contender
By dcalfine on 11/14/06, Rating: 0
RE: No Intel Contender
By Assimilator87 on 11/14/2006 11:12:13 PM , Rating: 2
What's the difference between Kuma and Rana, except for going from dual core to "duad core"? lolz


RE: No Intel Contender
By Russell on 11/15/06, Rating: -1
RE: No Intel Contender
By coldpower27 on 11/17/2006 11:45:24 PM , Rating: 2
Kuma is analagous to Antares while Rana is analagous to Arcturus, Antares while being a Dual Core also has the 2MB of shared LV3 cache as well, while the Arcturus core is going to be only a 2x512KB variant.


"Duad-core"?
By Goty on 11/14/2006 6:55:25 PM , Rating: 2
Typo on the "Kuma" cell.




single cores?
By poohbear on 12/5/2006 3:14:11 AM , Rating: 2
why would they even bother releasing single cores@ the END of 2007? should'nt single cores be a thing of the past now?




K8L Comes Just in Time to Lose to Core3
By photoguy99 on 11/14/06, Rating: -1
By saratoga on 11/14/2006 9:51:52 PM , Rating: 2
Argueably it was AMD catching up. Intel typically has a much larger lead time then the < 9 months they're getting now (and the 6 months AMD is claiming for the next round). People just got spoiled by Intel's recent screwups and forgot that the two typically trade places at the top relatively often.


By coldpower27 on 11/17/2006 11:27:19 PM , Rating: 2
Core 3, if they decide to use that name for Nehalem derivatives is not slated till sometime in Mid - Late 2008, so K8L will have about 3 - 4 Quarters advantage over Intel next generation architecture after Intel Core Microarchitecture.

Given that Nehlaem is going to be a year newer then K8L based products, I really would expect it to beat them.


"When an individual makes a copy of a song for himself, I suppose we can say he stole a song." -- Sony BMG attorney Jennifer Pariser

Related Articles
AMD 65nm Product Plans Unveiled
November 14, 2006, 3:17 PM
AMD Q4'06 Dual-Core Roadmap
October 3, 2006, 8:23 AM
Intel Hints at SSE4
September 27, 2006, 4:00 PM
AMD Announces More K8L Details
June 1, 2006, 2:02 PM













botimage
Copyright 2014 DailyTech LLC. - RSS Feed | Advertise | About Us | Ethics | FAQ | Terms, Conditions & Privacy Information | Kristopher Kubicki