Raytheon Co. claims to have developed the world's first
computer architecture that can adopt different forms depending on its
application. Dubbed MONARCH for “Morphable Networked Micro-Architecture,” Raytheon
says the chip was developed for the Department of Defense to address the large
data volume of sensor systems as well as their signal and data processing
throughput requirements.
The MONARCH contains six microprocessors and “a highly
interconnected reconfigurable computing array,” which according to Raytheon’s
estimates “provides 64 gigaflops with more than 60GB per second of memory
bandwidth and more than 43GB per second of off-chip data bandwidth.”
According to Raytheon’s presentation materials, the six
processors inside the MONARCH are of RISC scaler architecture and are capable
of Altivec-like SIMD operations. The processor contains 96 adders (fixed and
float), 96 multipliers, 124 dual port memories, 258 address generators, 12MB
on-chip DRAM, 14 DMA engines and 20 differential IFL (DIFL) ports capable of
1.3 GB per second each.
The MONARCH also performs as a single system on a chip, resulting
in a significant reduction of the number of processors required for computing
systems. The system’s polymorphic capabilities enable the development of defense
systems that need to be very small size, low power, and in some cases radiation
tolerance for such purposes as global positioning systems, airborne and space
radar and video processing systems.
“Typically, a chip is optimally designed either for
front-end signal processing or back-end control and data processing,” explained
Nick Uros, vice president for the Advanced Concepts and Technology group of
Raytheon Space and Airborne Systems. “The MONARCH micro-architecture is unique
in its ability to reconfigure itself to optimize processing on the fly. MONARCH
provides exceptional compute capacity and highly flexible data bandwidth
capability with beyond state-of-the-art power efficiency, and it's fully
programmable.”
In addition to the ability to adapt its architecture for a
particular objective, Raytheon believes that the MONARCH computer is one of the
most power-efficient processor available. Specifically, power requirements are
estimated between eight to 50 watts nominal. In relation to energy
efficiency and performance, the MONARCH outputs three to six gigaflops per
watt.
“In laboratory testing MONARCH outperformed the Intel
quad-core Xeon chip by a factor of 10,” said Michael Vahey, the principal
investigator for the company's MONARCH technology.
The MONARCH processor was developed under a Defense Advanced
Research Project Agency (DARPA) polymorphous computing architecture contract
from the U.S. Air Force Research Laboratory. Raytheon is currently testing
prototypes of the polymorphic MONARCH processors.